DRAM IP Development Layout (Internship)

Micron Technology; Tlaquepaque; Presencial; MXN 45.000 - 89.000; Jornada completa

Descripción de la vacante

Micron Technology is seeking a Layout Design Engineering Intern to contribute to the development and verification of IP layout cells used in memory products. You will work with experienced layout engineers on floorplanning, placement, routing and physical verification.

You will also gain hands-on experience with scripting and AI-supported development to improve engineering productivity and design quality. This internship offers exposure to CAD tools and industry standards.

Formación

• Pursuing a Bachelor's degree in a relevant engineering field.
• Expected graduation December 2027.

Responsabilidades

• Develop the layout of selected analog and digital IP layout cells under guidance of experienced layout engineers.
• Perform DRC and LVS verification and document findings.
• Create and deliver technical reports summarizing design work and verification results.
• Design and implement a SKILL-based automation solution to improve layout design or verification processes.
• Support engineering activities through AI-assisted development methodologies and productivity tools.

Conocimientos

Scripting

Time management

Communication

Problem solving

Educación

Electrical Engineering

Electronics Engineering

Mechatronics

Robotics

Nanotechnology

Computer Engineering

Herramientas

Cadence

Synopsys

Descripción del empleo

Our vision is to transform how the world uses information to enrich life for all.

Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.

At Micron, we are transforming how the world uses information to enrich life for all. As a Layout Design Engineering Intern, you will contribute to the development and verification of selected IP layout cells used in memory products. Working alongside experienced layout engineers, you will gain hands-on experience with industry-standard layout methodologies and participate in key activities such as floorplanning, placement, routing, and physical verification. You will also have the opportunity to develop automation solutions that improve engineering productivity, design quality, and efficiency through scripting and AI-supported development.

Responsibilities

• Develop the layout of selected analog and digital IP layout cells under the guidance of experienced layout engineers.
• Perform Design Rule Check (DRC) and Layout Versus Schematic (LVS) verification and document findings.
• Create and deliver technical reports summarizing design work, verification results, and key lessons learned.
• Design and implement a SKILL-based automation solution to improve layout design or verification processes, increasing engineering efficiency and quality.
• Support engineering activities through AI-assisted development methodologies and productivity tools.

Minimum Qualifications

• Student pursuing a Bachelor's degree in Electrical Engineering, Electronics Engineering, Mechatronics, Robotics, Nanotechnology, Computer Engineering, or a related field, preferably within the final two semesters of study.
• Expected graduation date of December 2027.
• Experience with at least one scripting language such as Python, Perl, or similar.
• Strong time management and organizational skills with the ability to work efficiently on multiple tasks.
• Effective verbal and written communication skills.

Preferred Qualifications

• Academic or internship experience related to semiconductor layout design processes.
• Understanding of Design Rule Checks (DRC) and Layout Versus Schematic (LVS) analysis.
• Applying AI applications in semiconductor development.
• Experience using Electronic Design Automation (EDA) tools such as Cadence or Synopsys.
• Interest in semiconductor memory technologies and physical design methodologies.

The specified role does not encompass the following responsibilities: Finalization of sales agreements or the execution of sales contracts is prohibited. The role also does not carry the authority to make definitive decisions regarding contracts, be it their conclusion or termination. Furthermore, the role is not designed to involve participation in pricing negotiations or the authorization of contracts. These activities fall beyond the permissible duties of the position.

We are an industry leader in innovative memory and storage solutions transforming how the world uses information to enrich life for all. With a relentless focus on our customers, technology leadership, and manufacturing and operational excellence, Micron delivers a rich portfolio of high-performance DRAM, NAND, and NOR memory and storage products through our Micron and Crucial brands. Every day, the innovations that our people create fuel the data economy, enabling advances in artificial intelligence and 5G applications that unleash opportunities - from the data center to the intelligent edge and across the client and mobile user experience.

To learn more, please visit micron.com/careers. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, veteran or disability status. To request assistance with the application process and/or for reasonable accommodations, please contact [e-mail].

Micron Prohibits the use of child labor and complies with all applicable laws, rules, regulations, and other international and industry labor standards.

Micron does not charge candidates any recruitment fees or unlawfully collect any other payment from candidates as consideration for their employment with Micron.