DDR Validation Engineer - LPDDR5X/6 Bring-Up & AI

North American Production Sharing, Inc.; Tijuana; On-site; MXN 520,000 - 780,000; Full time

Job summary

North American Production Sharing, Inc. seeks an experienced DDR Validation Engineer to lead end-to-end validation of LPDDR5X/LPDDR6 memory subsystems on AI Accelerator and flagship mobile platforms.

You will drive memory bring-up, validation, and production-readiness from pre-silicon through post-silicon stages. The role requires strong C/C++ software skills and a deep understanding of memory controllers, PHYs, and NoC interactions, with collaboration across architecture, firmware, and

Qualifications

• BS/MS/PhD in EE, CE, CS, or related field.
• 5+ years of experience in DDR/memory subsystem validation or silicon bring-up.
• Strong understanding of DDR controllers and PHYs.
• Memory training and calibration algorithms.
• Cache, coherency, and NoC architectures.
• Power management and low-power memory features.
• Proficiency in C/C++ and low-level software development.

Responsibilities

• Define and execute DDR validation strategy across emulation, FPGA, and silicon platforms.
• Drive LPDDR5X/LPDDR6 bring-up, training validation, frequency scaling, low-power state validation, and feature enablement.
• Develop and execute validation plans covering memory functionality, performance, reliability, power, and corner-case scenarios.
• Lead debug of DDR controller, PHY, firmware, SI/PI, timing, and system-level issues.
• Validate interactions between DDR, CPU, GPU, NPU, cache hierarchy, NoC, and system software.
• Drive bandwidth, latency, QoS, memory pressure, and AI workload characterization.
• Develop scalable automation, regression infrastructure, and debug analytics frameworks.
• Partner with Architecture, Design, Firmware, SI/PI, Package, and DRAM vendors to root-cause and resolve issues.

Job description

North American Production Sharing, Inc. seeks an experienced DDR Validation Engineer to lead end-to-end validation of LPDDR5X/LPDDR6 memory subsystems on AI Accelerator and flagship mobile platforms.

You will drive memory bring-up, validation, and production-readiness from pre-silicon through post-silicon stages. The role requires strong C/C++ software skills and a deep understanding of memory controllers, PHYs, and NoC interactions, with collaboration across architecture, firmware, and