SRAM / Memory Compiler Design Engineer - 0464

Sunrise Biztech Systems; Bengaluru; Vor Ort; INR 2.000.000 - 2.800.000; Teilzeit

Zusammenfassung

Sunrise Biztech Systems Pvt. Ltd. is seeking an experienced VLSI Engineer with strong knowledge of SRAM technologies, memory compilers, and VLSI design flows.

The role focuses on memory generation, quality assurance, and integration across multiple projects based in Bengaluru. Candidate should have 5+ years in VLSI design or physical design, hands-on SRAM/Memory Compiler experience, and familiarity with Synopsys Memory Compiler.

Qualifikationen

• 5+ years of relevant experience in VLSI design or physical design.
• Strong understanding of SRAM and Memory Compilers.
• Familiarity with Synopsys Memory Compiler is preferred.
• Knowledge of VLSI design flow and memory views (Verilog, .lib, LEF, GDSII).
• Understanding of DRC/LVS and SPICE simulations.
• Scripting experience in Perl, Unix Shell, Tcl, or Python.
• Experience with RTL-to-GDSII flow and PnR is desirable.

Aufgaben

• Support memory generation, quality assurance, and integration activities across multiple projects.

Kenntnisse

SRAM memory compilers

Synopsys memory compiler

Verilog

LEF

GDSII

DRC/LVS

SPICE simulations

Perl

Unix Shell

Tcl

Python

RTL-to-GDSII flow

PnR

Jobbeschreibung

Urgent Hiring!!!

Greetings from Sunrise Biztech Systems Pvt. Ltd.

We are hiring for one of our top leading semiconductor client. If you're interested and your experience matches the requirement, we'd love to hear from you.

Position: Memory Compiler / VLSI Engineer
Experience: 5+ Years

Location: Bengaluru

Contract tenure: 12 Months

Job Description

We are looking for an experienced VLSI Engineer with strong knowledge of SRAM technologies, memory compilers, and VLSI design flows. The candidate will support memory generation, quality assurance, and integration activities across multiple projects.

Required Skills

• 57 years of relevant experience in VLSI design or physical design.
• Strong understanding of SRAM and Memory Compilers.
• Familiarity with Synopsys Memory Compiler is preferred.
• Knowledge of VLSI design flow and memory views (Verilog, .lib, LEF, GDSII).
• Understanding of DRC/LVS and SPICE simulations.
• Scripting experience in Perl, Unix Shell, Tcl, or Python.
• Experience with RTL-to-GDSII flow and PnR is desirable.