Memory Compiler Engineer 0074

Sunrise Biztech Systems; Hyderabad; Sur place; INR 700 000 - 1 100 000; Temps partiel

Résumé du poste

Sunrise Biztech Systems Pvt. Ltd.

in Hyderabad is seeking an Engineering - Hardware Design Engineer 2 to work on SRAM technologies, memory compilers, and the VLSI design flow for memory view generation, validation, and release activities. You will work with memory views such as Verilog, Liberty, LEF, and GDS, support physical verification (DRC/LVS), run SPICE simulations, and develop scripts in Python, Perl, Tcl, or Unix Shell.

Qualifications

• Weeks of memory design and SRAM knowledge.
• Familiarity with memory compilers and VLSI design flow.
• Experience with memory views like Verilog/Liberty/LEF/GDS.
• Proficient scripting in Python, Perl, Tcl or Unix shell.

Responsabilités

• Understand Synopsys Memory Compiler documentation and resolve end-user technical queries.
• Generate compiled memory views and perform quality checks for each release.
• Work with memory views such as Verilog, Liberty, LEF, and GDS.
• Support physical verification activities, including DRC and LVS.
• Run and interpret SPICE circuit simulations.
• Execute and modify scripts using Python, Perl, Tcl, or Unix Shell.
• Track project deliverables, action items, and release deadlines.

Connaissances

SRAM knowledge

Memory design

VLSI design flow

Memory views

Python scripting

Perl scripting

Tcl scripting

Unix shell

Synopsys memory compiler

Formation

Bachelor's or Master's in Electronics/Electrical/VLSI

Outils

Verilog

Liberty

LEF

GDS

Synopsys Memory Compiler

Description du poste

Urgent Hiring!!!

Greetings from Sunrise Biztech Systems Pvt. Ltd.

We are hiring for one of our top leading Manufacturing client. If you're interested and your experience matches the requirement, we'd love to hear from you.

Job Title

Engineering - Hardware Design Engineer 2

Location

Hyderabad

Duration

9 Months

Job Description

We are looking for an engineer with a strong understanding of SRAM technologies, memory compilers, and VLSI design flow to support memory view generation, validation, and release activities.

Key Responsibilities

• Understand Synopsys Memory Compiler documentation and resolve end-user technical queries.
• Generate compiled memory views and perform quality checks for each release.
• Work with memory views such as Verilog, Liberty (.lib), LEF, and GDS.
• Support physical verification activities, including DRC and LVS.
• Run and interpret SPICE circuit simulations.
• Execute and modify scripts using Python, Perl, Tcl, or Unix Shell.
• Track project deliverables, action items, and release deadlines.

Required Skills

• Hands-on understanding of SRAM and memory compilers.
• Knowledge of VLSI/ASIC design flow and memory design.
• Familiarity with memory views and physical verification.
• Scripting skills in Python, Perl, Tcl, or Unix Shell.
• Synopsys Memory Compiler experience is preferred.

Education

Bachelor's or Master's degree in Electronics, Electrical Engineering, VLSI, or a related field.