Physical Verification Engineer-3617

Sunrise Biztech Systems; Bengaluru; On-site; INR 900,000 - 1,500,000; Full time

Job summary

Sunrise Biztech Systems Pvt. Ltd. in Bengaluru is hiring a Hardware Design Engineer 3 with 4–8 years of experience. The role focuses on SRAMs, memory compilers, and VLSI design flow within a cutting-edge Synthesis environment.

The candidate will support multiple projects in a globally distributed team, work with Synopsys memory compilers, and perform circuit simulations using SPICE, with scripting in PERL, Python, or Tcl.

Qualifications

• Solid experience with memory technologies and exposure to downstream VLSI Synthesis.
• Role supports multiple projects in a globally distributed team.
• SRAMs and memory compilers understanding is essential.

Responsibilities

• Read and understand documentation and answer end-user questions regarding Synopsys memory compilers.
• Generate compiled memory views and perform QA on those views for each released version.
• Perform program management, tracking action items and progress against due dates.

Skills

SRAMs

Memory compilers

VLSI design flow

Verilog

Timing views

LEF

GDS

DRC/LVS

SPICE simulations

Perl scripting

Python scripting

Unix shell

Tcl

Tools

Verilog

Timing (.lib)

LEF

GDS

SPICE

Synopsys memory compilers

PERL

Unix shell

Tcl

Job description

Urgent Hiring!!!

Greetings from Sunrise Biztech Systems Pvt. Ltd.

We are hiring for one of our reputed clients for the following position. If you're interested and your experience matches the requirement, we'd love to hear from you.

Position: Hardware Design Engineer 3

Experience: 4-8 Years

Location: BANGALORE

Full Time Employment/Contractual

Role & responsibilities:

Description:

Must solid experience with memory technologies, and a desire to develop broader exposure to their downstream use in a dynamic, cutting edge VLSI Synthesis environment.

This role will provide key support for multiple projects in a globally distributed team.

Responsibilities will include

• Read and understand documentation of and answer end-user question regarding Synopsys memory compilers Generate compiled memory views and perform quality assurance on those views for each released version.
• Perform program management, tracking action items and progress against due dates.

EXPERIENCE AND EDUCATION:

• Understanding of SRAMs and memory compilers (Synopsis Memory Compiler experience preferred) as well as VLSI design flow;
• Familiarity with memory design and views of memories, e.g. Verilog, timing (.lib), LEF, GDS;
• Familiarity with physical design verification, e.g. DRC and LVS;
• Able to perform and interpret circuit simulations, e.g. using SPICE;
• Ability to execute and modify scripts in PERL, Unix shell, Tcl, Python or related language.

Preferred candidate profile

4-6 years of experience.