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SiMaxTech Pvt Ltd in Bengaluru South is seeking a Senior Engineer – Analog Layout to design, implement, and optimize analog layout for complex ICs, focusing on high-performance power management blocks. You will collaborate with analog designers to translate schematics into robust layouts, perform LVS/DRC, address matching and noise, and support tape-out and post-silicon improvements.
The role requires on-site work in Bengaluru South and strong English communication.
SiMaxTech Pvt Ltd is a fast-growing semiconductor design services company that delivers end-to-end chip solutions to global customers. The company has deep expertise across the semiconductor value chain, enabling clients to build next-generation products with high performance, quality, and faster time-to-market. Its engineering team covers the full design spectrum, from Analog Circuit Design and Custom Layout to RTL, Verification, Physical Design, Embedded Design, and full-chip/SoC backend. SiMaxTech works across a wide range of process technologies, from mature nodes like 65nm and 40nm to advanced nodes such as 7nm, 5nm, 3nm, and emerging nodes including 2nm and 18A. With a culture of continuous learning, innovation, and customer-centric delivery, the company aims to be the preferred semiconductor design partner for global customers.
The Senior Engineer – Analog Layout will be responsible for designing, implementing, and optimizing analog layout for complex integrated circuits, with a focus on high-performance and reliable power management and analog blocks. This full-time, on-site role is based in Bengaluru South and involves close collaboration with analog circuit designers to translate schematics into robust layouts that meet performance, area, and reliability targets. Day-to-day tasks include creating device-level and block-level layouts, performing layout-versus-schematic (LVS) and design rule checks (DRC), ensuring matching and noise performance, and addressing electromigration and IR-drop concerns. The role also includes working across different technology nodes, preparing documentation, participating in design reviews, and coordinating with cross-functional teams to support tape-out and post-silicon improvements.