Analog Layout Engineer

Scaledge Technology; Hyderabad; On-site; INR 600,000 - 1,000,000; Full time

Job summary

A leading technology firm in Hyderabad is seeking a skilled Analog Layout Engineer with experience in advanced technology nodes. The candidate will be responsible for designing and developing critical analog and mixed-signal layout blocks, ensuring high-quality delivery. Preferred qualifications include expertise in Cadence Virtuoso and Mentor Graphics tools, with a strong educational background in Electronics or VLSI. This role requires good communication skills and the ability to work with cross-functional teams.

Qualifications

• Strong hands-on experience in advanced process nodes like TSMC 16nm / 12nm / 7nm / 5nm / 3nm.
• Expertise in Cadence Virtuoso Layout Editor (VLE/VXL).
• Good understanding of layout techniques for analog and mixed-signal circuits.

Responsibilities

• Design and develop critical analog, mixed-signal, and custom digital layout blocks.
• Support full-chip level integration and layout implementation.
• Perform layout verification including LVS, DRC, and DFM.

Skills

Layout design

Analog and mixed-signal design

Independent work

Communication skills

Collaboration

Education

BE / B.Tech / M.Tech in Electronics / VLSI / Electrical Engineering

Tools

Cadence Virtuoso Layout Editor

Mentor Graphics Calibre DRC/LVS

Job description

We are looking for skilled Analog Layout Engineers with strong experience in advanced technology nodes to join our team in Hyderabad. The candidate will be responsible for layout design and development of analog and mixed-signal blocks, ensuring high-quality delivery and adherence to physical verification requirements.

Key Responsibilities

• Design and develop critical analog, mixed-signal, and custom digital layout blocks.
• Support full-chip level integration and layout implementation.
• Perform layout verification including:
• LVS (Layout vs Schematic)
• DRC (Design Rule Check)
• DFM (Design for Manufacturability)
• EM/IR analysis
• Ensure timely delivery of block-level layouts with high quality and design compliance.
• Work closely with design, verification, and cross-functional teams to achieve project goals.
• Handle layouts for advanced technology nodes with minimal supervision.

Required Skills & Experience

• Strong hands-on experience in advanced process nodes such as:
• TSMC 16nm / 12nm / 7nm / 5nm / 3nm or below
• Experience with Intel, Samsung, or GlobalFoundries nodes is also acceptable.
• Preferably recent experience in TSMC 5nm or 3nm nodes.
• Expertise in Cadence Virtuoso Layout Editor (VLE/VXL).
• Strong experience in Mentor Graphics Calibre DRC/LVS.
• Good understanding of layout techniques for analog and mixed-signal circuits.
• Ability to work independently and take ownership of tasks.

Preferred Skills

• Experience with HBM (High Bandwidth Memory) layouts.
• Hands‑on experience in analog blocks such as:
• Regulators
• Charge Pumps

Education

• BE / B.Tech / M.Tech in Electronics / VLSI / Electrical Engineering.

Soft Skills

• Strong communication and collaboration skills.
• Ability to work effectively with cross-functional teams in a fast‑paced environment.