Analog Layout Engineer

Acesoft Labs; Hyderabad; On-site; INR 2,000,000 - 3,200,000; Full time

Job summary

Acesoft Labs in Hyderabad (WFO) is seeking a Senior Analog / Custom Layout Engineer with 5–7 years of experience to design and implement critical analog, mixed-signal, and custom digital layouts. You will own block-level and full-chip integration, translate schematics into layouts, and collaborate with teams to ensure on-time delivery.

Proficiency in Cadence Virtuoso and Mentor Calibre, and experience with 3nm FinFET nodes are required to excel in this role.

Qualifications

• 5–7 years of experience in analog/layout.
• Strong proficiency with Cadence Virtuoso and Calibre tools.
• Experience with advanced CMOS FinFET nodes (3nm mandatory).
• Ability to own block-level and full-chip integration.

Responsibilities

• Design and develop analog, mixed-signal & custom digital layouts.
• Own block-level and full-chip integration support.
• Translate schematics into high-quality layouts.
• Perform DRC/LVS/Antenna checks using industry-standard tools.
• Ensure on-time delivery with zero compromise on quality.
• Review and guide junior engineers; collaborate with global teams.

Skills

Cadence Virtuoso

Mentor Calibre

FinFET 3nm

Analog Layout

Device Parasitics

Education

BE / MTech in Electronics or VLSI Engineering

Tools

Calibre

Job description

Hiring | Senior Analog / Custom Layout Engineer

Location: Hyderabad (WFO)

Experience: 5 to 7 Years

What Youll Be Doing

• Design and develop critical analog, mixed-signal & custom digital layouts
• Own block-level and full-chip integration support
• Translate schematics into high-quality, multi-dimensional layouts
• Perform DRC / LVS / Antenna checks using industry-standard tools
• Ensure on-time delivery with zero compromise on quality
• Debug complex PV issues with a problem-solvers mindset
• Review and guide junior engineers , raising the bar across the team
• Collaborate closely with local & global engineering teams

Must-Have Skills (Non-Negotiable)

• Strong hands-on expertise in Cadence Virtuoso (VLE/VXL)
• Deep experience with Mentor Calibre DRC/LVS
• TSMC FinFET nodes: 3nm (MANDATORY), 5nm / 7nm / 16nm
• Proven experience in advanced CMOS analog/custom layout
• Rock-solid fundamentals devices, matching, parasitics, reliability

Education

• BE / MTech in Electronics or VLSI Engineering