Physical Design Engineer VLSI

Sunrise Biztech Systems

Hyderabad

On-site

INR 900,000 - 1,300,000

Full time

6 days ago
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Job summary

Sunrise Biztech Systems Pvt. Ltd. in Hyderabad is seeking a Physical Design Engineer VLSI with 3-6 years of experience to work on memory compiler related tasks. The role involves reading documentation, answering end-user queries, and generating memory views with QA checks on releases.

You will handle Verilog, .lib, LEF and GDS views while supporting DRC/LVS verification and SPICE simulations. The position is based in Hyderabad and contract-based for 12 months.

Qualifications

  • 3-6 years of VLSI Physical Design experience
  • Familiarity with memory compilers and memory views
  • Experience with SPICE simulations and layout verification

Responsibilities

  • Read and understand documentation related to Synopsys Memory Compilers
  • Address end-user queries related to memory compiler outputs and usage
  • Generate compiled memory views and perform quality assurance on released memory versions
  • Work with different memory views including Verilog, .lib, LEF and GDS
  • Support physical design verification activities including DRC and LVS
  • Perform and interpret circuit simulations using SPICE
  • Track project activities, action items and progress against defined timelines
  • Execute and modify automation scripts for VLSI workflows

Skills

Memory compiler outputs
Documentation understanding
End-user support

Tools

Synopsys Memory Compilers
Verilog
LEF
GDS
DRC/LVS
SPICE simulations
Automation scripts

Job description

Urgent Hiring!!!

Greetings from Sunrise Biztech Systems Pvt. Ltd.

We are hiring for one of our reputed clients for the following position. If you're interested and your experience matches the requirement, we'd love to hear from you.

Position: Physical Design Engineer VLSI

Experience: 3-6 Years

Location: Hyderabad

Contarct :12 Months

Role & responsibilities
  • Read and understand documentation related to Synopsys Memory Compilers
  • Address end-user queries related to memory compiler outputs and usage
  • Generate compiled memory views and perform quality assurance on released memory versions
  • Work with different memory views including Verilog, .lib, LEF and GDS
  • Support physical design verification activities including DRC and LVS
  • Perform and interpret circuit simulations using SPICE
  • Track project activities, action items and progress against defined timelines
  • Execute and modify automation scripts for VLSI workflows
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