Dft Verification Engineer

Sunrise Biztech Systems; Bengaluru; On-site; INR 1,200,000 - 2,100,000; Full time

Job summary

Sunrise Biztech Systems Pvt. Ltd. in Bengaluru is seeking a DFT Verification Engineer 3 with 5-8 years of experience to join our VLSI design team. The role focuses on verifying DFT logic including scan, BIST, JTAG and boundary scan, ensuring fault coverage and silicon quality.

Work with design and DFT teams to review architectures, perform GLS with SDF back-annotation, and verify timing. Must bring scripting skills in Perl/Python/Shell for automation and deliver DFT verification closure metrics.

Qualifications

• B.E./B.Tech or M.Tech in Electronics, VLSI or Computer Engineering.
• 5-8 years hands-on DFT verification experience.
• Strong knowledge of scan architecture, ATPG, MBIST, JTAG, and boundary scan.
• Experience with industry standard EDA tools and scripting for automation.

Responsibilities

• Perform functional verification of DFT logic (scan chains, ATPG, test control logic, TAP controller, boundary scan) using simulation
• Collaborate with design and DFT implementation teams to review and verify DFT architecture and netlist
• Validate scan compression, X-masking, and clock domain constraints
• Perform gate-level simulation (GLS) with SDF back-annotation to verify timing and DFT correctness
• Debug DFT-related failures and work with cross-functional teams for root cause analysis
• Review and sign off on DFT verification closure metrics including fault coverage and chain continuity

Skills

DFT verification

Scan architecture

ATPG

JTAG (IEEE 1149.1)

MBIST

HDL simulators

Education

BE/B.Tech or M.Tech in Electronics/VLSI/Computer Engineering

Tools

Synopsys Tessent

TetraMAX

Mentor ATPG

VCS

Xcelium

Questa

Job description

Urgent Hiring!!!

Greetings from Sunrise Biztech Systems Pvt. Ltd.

We are hiring for one of our reputed clients for the following position. If you're interested and your experience matches the requirement, we'd love to hear from you.

Position: Verification Engineer 3
Experience: 5-8 Years

Location:BANGALORE

Full Time Employment

Role & responsibilities

Description: Title: DFT Verification Engineer

Experience: 5-8 Years

Job Summary:

We are looking for a skilled DFT Verification Engineer to join our VLSI design team. The ideal candidate will be responsible for verifying DFT logic including scan, BIST, JTAG, and boundary scan verification on complex SoC designs, ensuring high fault coverage and silicon quality.

Key Responsibilities:

• Perform functional verification of DFT logic (scan chains, ATPG, test control logic, TAP controller, boundary scan) using simulation
• Collaborate with design and DFT implementation teams to review and verify DFT architecture and netlist
• Validate scan compression, X-masking, and clock domain constraints
• Perform gate-level simulation (GLS) with SDF back-annotation to verify timing and DFT correctness
• Debug DFT-related failures and work with cross-functional teams for root cause analysis
• Review and sign off on DFT verification closure metrics including fault coverage and chain continuity

Required Skills & Qualifications:

• B.E./B.Tech or M.Tech in Electronics / VLSI / Computer Engineering
• 5-8 years of hands-on experience in DFT verification
• Strong knowledge of scan architecture, ATPG, MBIST, JTAG (IEEE 1149.1), and boundary scan
• Proficiency with industry-standard EDA tools: Synopsys Tessent / TetraMAX, Mentor ATPG
• Experience with HDL simulation using VCS, Xcelium, or Questa
• Good understanding of STA constraints and their impact on DFT
• Familiarity with UVM/OVM-based verification methodologies is a plus
• Experience with Perl/Python/Shell scripting for verification automation