DFT Engineer

ACL Digital; Bengaluru; On-site; INR 1,200,000 - 1,800,000; Full time

Job summary

ACL Digital is seeking a skilled DFT Engineer with 4+ years in ASIC design and verification to architect and verify DFT solutions. You will implement scan insertion, ATPG, and MBIST, and validate test coverage to ensure manufacturability.

Responsibilities include RTL modifications for DFT features, generating test vectors with Tetramax/Fastscan, and collaborating with RTL, PD, and validation teams to integrate DFT seamlessly.

Qualifications

• Deep knowledge of DFT concepts including scan, compression, boundary scan, and BIST.
• Experience with ATPG/MBIST/LBIST and test pattern generation.
• Proficiency with automated scripting for workflows (Python/Perl/TCL).

Responsibilities

• Develop and implement DFT architectures such as scan insertion and ATPG.
• Modify RTL for DFT features and verify test coverage.
• Generate and validate test vectors using Tetramax/Fastscan.
• Run gate-level simulations and debug coverage issues.
• Collaborate with RTL, PD, and validation teams for DFT integration.

Skills

DFT concepts

ATPG

MBIST/LBIST

Boundary scan

RTL debugging

Tools

Synopsys DFT Compiler

Tetramax

Mentor Tessent

RTL-to-GDS flow

Python scripting

Perl scripting

TCL scripting

Job description

Job Description:We are looking for a skilled DFT Engineer with 4+ years of experience in ASIC design and verification with a strong focus on Design-for-Test methodologies. You will be responsible for implementing and verifying DFT architectures to ensure high test coverage and manufacturability.

Key Responsibilities:

• Develop and implement DFT architecture including scan insertion, ATPG, MBIST, and boundary scan.
• Work on RTL design modifications for DFT features
• Generate and validate test vectors using tools like Tetramax/Fastscan
• Run gate-level simulations and debug test coverage issues
• Perform pattern validation on emulation/silicon platforms
• Collaborate with RTL, PD, and validation teams for seamless DFT integration.

Required Skills:

• Strong knowledge of DFT concepts: scan, compression, boundary scan, ATPG, BIST (LBIST/MBIST).
• Experience with tools such as Synopsys DFT Compiler, Tetramax, Mentor Tessent.
• Scripting skills in Python, Perl, or TCL for automation.
• Familiarity with STA, synthesis, and timing constraints
• Good understanding of RTL-to-GDS flow

Good to Have

• Exposure to automotive or high-reliability designs
• Experience with silicon bring-up and pattern debug.