VLSI Verification Intern – Hybrid, AI HPC Focus

Hewlett Packard Enterprise Development LP; Chippewa Falls (WI); Hybrid; USD 48,000 - 56,000; Full time

Benefits offered by this job

Hybrid work arrangement

Job summary

Hewlett Packard Enterprise is seeking an enthusiastic VLSI Design Verification intern to join our Hybrid internship program in Wisconsin. You will collaborate with architects, logic designers, and verification engineers on Slingshot ASIC verification projects, learn SystemVerilog and UVM, and participate in design and debugging discussions.

The role emphasizes coursework in digital design, experience with Verilog/SystemVerilog, and scripting, with opportunities to apply AI-assisted workflows in

Qualifications

• Pursuing a bachelor’s or master’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field
• Coursework in digital design and computer architecture
• Experience with object-oriented programming
• Strong analytical and problem-solving skills
• Clear written and verbal communication skills
• Willingness to ask questions, explain your reasoning, and participate in technical discussions

Responsibilities

• Develop SystemVerilog and UVM testbench components, including models, monitors, scoreboards, and checkers
• Write constrained-random tests
• Develop and analyze functional coverage to identify verification gaps
• Debug regression failures and help identify, log, and resolve logic bugs
• Work directly with ASIC designers and architects
• Use scripting, automation, and AI-assisted tools to improve the verification process

Skills

SystemVerilog

UVM

Python

Linux

C/C++

Verilog

VHDL

Education

Bachelor's or Master's in Electrical Engineering / Computer Engineering / CS

Tools

Verilog

SystemVerilog

VHDL

Python

Linux

Job description

Hewlett Packard Enterprise is seeking an enthusiastic VLSI Design Verification intern to join our Hybrid internship program in Wisconsin. You will collaborate with architects, logic designers, and verification engineers on Slingshot ASIC verification projects, learn SystemVerilog and UVM, and participate in design and debugging discussions.

The role emphasizes coursework in digital design, experience with Verilog/SystemVerilog, and scripting, with opportunities to apply AI-assisted workflows in