VLSI Design Verification Intern – Hybrid, SystemVerilog/UVM

Hewlett Packard Enterprise

United States

Hybrid

USD 48,000 - 56,000

Full time

9 days ago
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Job summary

Hewlett Packard Enterprise is seeking a VLSI Design Verification Intern to join a hybrid team working on Slingshot interconnect verification for HPC and AI systems. You will learn industry-standard SystemVerilog and UVM techniques while collaborating with architects and designers on a switch or NIC ASIC verification project.

The internship emphasizes hands-on hardware verification, scripting, and exposure to AI-assisted workflows, with opportunities to contribute to design discussions and career

Qualifications

  • Pursuing a bachelor’s or master’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field
  • Coursework in digital design and computer architecture
  • Experience with object-oriented programming

Responsibilities

  • Develop SystemVerilog and UVM testbench components, including models, monitors, scoreboards, and checkers
  • Write constrained-random tests
  • Develop and analyze functional coverage to identify verification gaps
  • Debug regression failures and help identify, log, and resolve logic bugs
  • Work directly with ASIC designers and architects
  • Use scripting, automation, and AI-assisted tools to improve the verification process

Skills

Object-oriented programming
Analytical thinking
Communication skills

Education

Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or Computer Science

Tools

Verilog/SystemVerilog/VHDL
Python

Job description

Hewlett Packard Enterprise is seeking a VLSI Design Verification Intern to join a hybrid team working on Slingshot interconnect verification for HPC and AI systems. You will learn industry-standard SystemVerilog and UVM techniques while collaborating with architects and designers on a switch or NIC ASIC verification project.

The internship emphasizes hands-on hardware verification, scripting, and exposure to AI-assisted workflows, with opportunities to contribute to design discussions and career

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