TPU Test Infrastructure Engineer – Cloud HPC

Google LLC; Sunnyvale (CA); On-site; USD 138,000 - 197,000; Full time

Benefits offered by this job

Equity

Benefits

Job summary

Google LLC is seeking a test engineer to shape the future of AI/ML hardware acceleration, focusing on TPU architecture verification and integration within AI/ML-driven systems. You will contribute to cutting-edge silicon solutions powering TPU technology used by millions of users worldwide.

The role emphasizes post-silicon NPI and high-volume manufacturing test strategies for next-generation TPU and HPC products, with development and validation of advanced Automated Test Equipment programs and

Qualifications

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field (or equivalent practical experience).
• 4 years of experience in test engineering.
• Experience scripting in Python or Java.
• Experience with ATE test platforms (Advantest 93K and Teradyne UltraFlex SOC).

Responsibilities

• Collaborate with Architecture, Design, and Verification teams to develop new product bring-up, validation, characterization, and qualification strategies, and manufacturing test solutions for HPC products.
• Verify test solutions on pre-silicon models and develop ATE test modules, DC tests, binning, production, and characterization flows.
• Develop and validate test programs on ATE platforms for new product integration in preparation for high-volume manufacturing, working with ATE vendors and internal cross-functional teams.
• Create tools, flows, and methodologies to improve and automate the testing life-cycle.
• Influence and work with upstream and downstream partners to enable automated test solutions.

Skills

Python

Java

Test engineering

ATE platforms

C/C++

C#

Education

Bachelor's degree in Electrical Engineering / Computer Engineering / Computer Science

Master's degree preferred

Tools

Advantest 93K

Teradyne UltraFlex

Job description

Google LLC is seeking a test engineer to shape the future of AI/ML hardware acceleration, focusing on TPU architecture verification and integration within AI/ML-driven systems. You will contribute to cutting-edge silicon solutions powering TPU technology used by millions of users worldwide.

The role emphasizes post-silicon NPI and high-volume manufacturing test strategies for next-generation TPU and HPC products, with development and validation of advanced Automated Test Equipment programs and