Staff Verification Architect: Coherent Interconnect

SiFive, Inc.; Boston (MA); On-site; USD 120,000 - 160,000; Full time

Benefits offered by this job

Variable/incentive compensation

Comprehensive healthcare

Retirement plans

Paid time off

Job summary

SiFive, Inc. is seeking a Staff Design Verification Engineer in Boston to drive verification of next-generation cache-coherent interconnect subsystems. You will own complex verification problems and enhance the overall verification quality.

The ideal candidate has 7+ years of ASIC/SoC design verification experience, strong abilities in SystemVerilog and UVM, and a comprehensive understanding of cache-coherent systems.

Qualifications

• 7+ years of experience in ASIC or SoC design verification.
• Strong hands-on experience with SystemVerilog and UVM-based verification.
• Strong understanding of cache-coherent systems, on-chip interconnects, or memory-system verification.

Responsibilities

• Own verification planning and execution for a scalable cache-coherent interconnect subsystem.
• Develop and maintain robust verification environments and checkers.
• Drive verification of advanced interconnect behaviors such as QoS handling.

Skills

SystemVerilog

UVM-based verification

Debugging skills

Coherent systems knowledge

ASIC/SoC design verification

Education

Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field

Job description

SiFive, Inc. is seeking a Staff Design Verification Engineer in Boston to drive verification of next-generation cache-coherent interconnect subsystems. You will own complex verification problems and enhance the overall verification quality.

The ideal candidate has 7+ years of ASIC/SoC design verification experience, strong abilities in SystemVerilog and UVM, and a comprehensive understanding of cache-coherent systems.