Staff Engineer - Semiconductor Packaging Mechanical Simulation

Samsung Semiconductor

San Jose (CA)

On-site

USD 163,000 - 253,000

Full time

14 days+

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Benefits offered by this job

Paid time off 4+ weeks

Holidays & sick leave

Fertility/adoption stipend

Medical/Dental/Vision/401k package

Onsite café & gym

Job summary

Samsung Semiconductor in San Jose is hiring a Packaging Engineer, Mechanical Simulation to lead the development and design evaluation of next-generation semiconductor packages and memory devices through advanced mechanical modeling.

You will collaborate with cross-functional, multicultural teams to drive innovative packaging solutions, automate simulation workflows, and bridge numerical predictions with experimental validation. Location is daily onsite at our San Jose HQ.

Qualifications

PhD in Mechanical Engineering, Engineering Mechanics, Materials Science, Physics, or a closely related discipline.
3-5+ years of hands-on modeling and simulation experience in the high-tech or semiconductor industry.
Proven expertise with leading simulation tools such as ANSYS, Abaqus, HyperMesh and their associated pre-/post-processing software.
Extensive experience in static and dynamic simulations, covering linear and nonlinear analyses that involve geometric and material non‑
In-depth understanding of advanced semiconductor packaging, interconnect structures, and reliability-modeling techniques.
Strong technical-writing skills, capable of producing clear, comprehensive documentation and communicating complex concepts to both technical and non‑technical audiences.
You’re inclusive, adapting your style to the situation and diverse global norms of our people.
An avid learner, you approach challenges with curiosity and resilience, seeking data to help build understanding.
You’re collaborative, building relationships, humbly offering support and openly welcoming approaches.
Innovative and creative, you proactively explore new ideas and adapt quickly to change.

Responsibilities

Perform advanced numerical modeling and simulation to evaluate and improve the performance and reliability of cutting‑edge semiconductor packages and memory devices.
Provide mechanical design support throughout package‑and system‑development stages—from concept and detailed modeling to qualification and reliability testing.
Apply hands‑on expertise in mechanical and thermal modeling of micro‑electronic components, including interconnects, solder joints, BGAs, and advanced‑packaging architectures.
Develop and maintain scripts for process automation (Python, MATLAB, or ANSYS APDL) to streamline pre‑processing, simulation, and post‑processing workflows for parametric and sensitivity studies.
Leverage a solid understanding of semiconductor manufacturing, advanced‑packaging technologies, material properties, and associated design and reliability constraints.
Design, execute, and interpret validation experiments that correlate and calibrate simulation models with empirical data.
Contribute effectively both independently and as a member of cross‑functional, cross‑cultural, and globally distributed teams.