Space-Grade RFIC Layout Engineer

United States Digital Space LLC; Hawthorne (CA); On-site; USD 105,000 - 150,000; Full time

Job summary

United States Digital Space LLC's Starshield team seeks an RFICLayoutDesigner to lead the layout discipline for advanced analog and RFIC designs, collaborating with ASIC, firmware, and verification teams to deliver high‑performance chips for space and government missions. You will design floor plans, manage parasitic minimization, perform checks, and coordinate with EDA tools, packaging, and vendors.

A bachelor in EE/CE or 3+ years' layout experience is required, with exposure to 16nm+ nodes and

Qualifications

• Bachelor’s degree or 3+ years in IC layout if no degree.
• Strong analog layout and RF layout experience required.
• Experience with 16nm, 7nm, 5nm or below preferred.

Responsibilities

• Determine chip floor plan and power/ground strategies.
• Estimate layout schedule and manage complexity.
• Perform RF/analog layout with minimized parasitics.
• Run DRC/ERC and LVS checks and fix issues.
• Integrate top-level layout with ESD structures and pad assembly.
• Collaborate with EDA vendors and guide team on techniques.

Skills

Analog layout

Advanced node layouts

RF circuit placement

LNA/VCO/Mixers layout

Scripting languages

Revision control

Linux knowledge

Communication skills

Independent problem solving

Education

Bachelor’s degree in Electrical or Computer Engineering

Tools

EDA tools

Job description

United States Digital Space LLC's Starshield team seeks an RFICLayoutDesigner to lead the layout discipline for advanced analog and RFIC designs, collaborating with ASIC, firmware, and verification teams to deliver high‑performance chips for space and government missions. You will design floor plans, manage parasitic minimization, perform checks, and coordinate with EDA tools, packaging, and vendors.

A bachelor in EE/CE or 3+ years' layout experience is required, with exposure to 16nm+ nodes and