SOC Physical Design Engineer: P&R to Tapeout

Apple Inc.; San Diego (CA); On-site; USD 142,300 - 263,300; Full time

Benefits offered by this job

RSU awards

Stock purchase at discount

Relocation assistance

Medical and dental coverage

Retirement benefits

Employee discounts

Tuition reimbursement

Job summary

Apple is seeking a highly experienced engineer to oversee physical implementation of design partitions for a complex SOC, translating from netlist to tapeout. You will collaborate with logic design to integrate partition architecture early in the cycle and ensure adherence to schedules and performance goals.

Responsibilities include netlist-to-GDS2 implementation, timing and physical verification, and driving signoff closure for partitions, while resolving design and flow issues to push

Qualifications

• BS degree and 3+ years of relevant industry experience.
• Experience with partition level P&R implementation.
• Experience with floorplanning, clock and power distribution, timing closure, physical verification, electrical verification.

Responsibilities

• Implement partitions from netlist to GDS2 with schedule and design goals.
• Drive timing, physical and electrical verification and signoff closure for partitions.
• Resolve and improve physical design issues and drive execution.

Skills

Partition level P&R

Floorplanning

Clock and power distribution

Timing closure

Physical verification

Electrical verification

Education

Bachelor's degree

Job description

Apple is seeking a highly experienced engineer to oversee physical implementation of design partitions for a complex SOC, translating from netlist to tapeout. You will collaborate with logic design to integrate partition architecture early in the cycle and ensure adherence to schedules and performance goals.

Responsibilities include netlist-to-GDS2 implementation, timing and physical verification, and driving signoff closure for partitions, while resolving design and flow issues to push