Senior Test Readiness Lead and DFT Engineer

Celestica Inc.; Richardson (TX); On-site; USD 120,000 - 150,000; Full time

Job summary

Celestica Inc. seeks a Sr Staff Engineer to own end-to-end test architecture and execution for next-generation products. You will lead a team of test hardware and software engineers and align with front-end/back-end leadership to maximize test coverage and throughput.

The role emphasizes DFT strategy, collaboration with tier-1 silicon partners, and development of unified test specifications and coverage matrices. Strong project management and data analytics are essential.

Qualifications

• 8+ years in Test Development, Functional Testing architecture, ATE hardware, or NPI Test leadership.

Responsibilities

• Lead test hardware/software team to design ICT, FCT, SLT, ESS, and boundary scan solutions.
• Define metrics, KPIs, and performance evaluations for test engineering teams.
• Plan engineering bandwidth, CapEx budgets, and lab infra for multiple NPI projects.
• Drive DFT/DFx reviews during schematic and layout stages with silicon partners.

Skills

DFT methodologies

JTAG boundary scan

High-speed interfaces

SerDes

Python

C/C++

LabVIEW

SPC

Six Sigma Black Belt

Project management

Education

Bachelor's or Master's in Electrical/Computer Engineering or Computer Science

Tools

PCIe Gen5/6

Boundary Scan Tools

Job description

Celestica Inc. seeks a Sr Staff Engineer to own end-to-end test architecture and execution for next-generation products. You will lead a team of test hardware and software engineers and align with front-end/back-end leadership to maximize test coverage and throughput.

The role emphasizes DFT strategy, collaboration with tier-1 silicon partners, and development of unified test specifications and coverage matrices. Strong project management and data analytics are essential.