Senior Lead: Hardware DFT & PCBA Testability

Celestica; Richardson (TX); On-site; USD 120,000 - 180,000; Full time

Job summary

Celestica, located in Richardson, TX, seeks a Senior Lead, Hardware DFT & Testability Engineer (PCBA) to embed testability into PCB designs early in the cycle. You will act as upstream design gatekeeper, performing in-design testability reviews and auditing ICT access to drive high-yield, debug-ready releases.

Ideal candidates have 4+ years in PCBA DFT/ICT and a strong background in board-level DFT, boundary scan, and high-density layouts.

Qualifications

• 4+ years of PCBA DFT/ICT or Manufacturing Test Engineering experience.
• Bachelor’s degree in Electrical Engineering or Electronics.
• Strong background in board-level DFT, schematic reviews, and high-density PCB layouts.
• Experience with ICT fixtures like Keysight 3070, Teradyne, or Takaya.
• Knowledge of IEEE 1149.1 Boundary Scan/JTAG.

Responsibilities

• Pre-Freeze Audits: review schematics and high-density PCB layouts against DFT rules before layout freeze.
• Coverage Modeling: quantify coverage gaps vs MTRS targets before manufacturing begins.
• Finding Disposition: resolve testability issues via test-point additions and boundary scan corrections.
• Validation & Verification: confirm coverage on actual test fixtures and document discrepancies.
• Site Support: assist with functional test definition and early debug with TRLs and test SMEs.
• Rule Evolution: propose DFT rule updates from test escapes and post-build rework.
• Formal testability reviews and fully dispositioned DFT findings before CAD freeze.
• Coverage models mapped against MTRS for traceability.
• Empirical evidence packages for achieved coverage on first fixtures.

Skills

Board-level DFT

In-Circuit Testing

Boundary Scan

Schematic review

Education

Bachelor’s degree in Electrical/Electronic Engineering

Tools

Keysight 3070

Teradyne TestStation

Takaya flying probe

Job description

Celestica, located in Richardson, TX, seeks a Senior Lead, Hardware DFT & Testability Engineer (PCBA) to embed testability into PCB designs early in the cycle. You will act as upstream design gatekeeper, performing in-design testability reviews and auditing ICT access to drive high-yield, debug-ready releases.

Ideal candidates have 4+ years in PCBA DFT/ICT and a strong background in board-level DFT, boundary scan, and high-density layouts.