Senior Test Engineering Lead: DFT & NPI

Celestica Inc.; Richardson (TX); On-site; USD 130,000 - 190,000; Full time

Job summary

Celestica, Inc. seeks a Sr Staff Engineer to own the end-to-end test architecture, strategy, and execution for next-generation products and infrastructure.

You will lead a high-performing team of test hardware and software engineers, collaborating with silicon designers, internal teams, and制造 partners to maximize coverage and yield. Responsibilities include DFT strategy ownership, BIST/JTAG integration, and a unified test specification framework.

Qualifications

• 8+ years in test development or testing architecture for high-density hardware.
• Leadership of multi-disciplinary test hardware/software teams.
• Experience with DFT, IEEE 1149.x boundary scan, and high-speed interfaces.
• Ability to translate yield constraints into business risks for leadership.

Responsibilities

• Lead end-to-end test strategy, architecture, and execution for products.
• Define metrics, KPIs, and career paths for the test teams.
• Oversee ICT, FCT, SLT, and burn-in test across NPI programs.
• Collaborate with silicon partners to embed BIST and JTAG strategies.
• Drive test plan architecture and data analytics for yield optimization.

Skills

Test leadership

DFT/DFx expertise

Boundary Scan (JTAG)

High-speed interfaces

Python

C/C++

LabVIEW

Education

Bachelor’s or Master’s in Electrical Engineering

Tools

LabVIEW

Python

C/C++

Boundary Scan Tools

Job description

Celestica, Inc. seeks a Sr Staff Engineer to own the end-to-end test architecture, strategy, and execution for next-generation products and infrastructure.

You will lead a high-performing team of test hardware and software engineers, collaborating with silicon designers, internal teams, and制造 partners to maximize coverage and yield. Responsibilities include DFT strategy ownership, BIST/JTAG integration, and a unified test specification framework.