Senior Staff GPU IP Physical Design Engineer

Samsung Semiconductor; Austin (TX); On-site; USD 180,000 - 270,000; Full time

Benefits offered by this job

Medical

Dental

Vision

Life insurance

401(k)

Onsite lunch

Tuition assistance

Paid time off

Wellness incentives

Job summary

Samsung Electronics America, Inc. in Austin, TX, is seeking a Senior Staff GPU Physical Design Engineer to shape full-chip and block-level implementation, driving PPA targets across advanced-node GPUs and SoCs.

You’ll collaborate with architecture, RTL, design technology, software, and external vendors to resolve complex challenges and deliver high-quality silicon. The role emphasizes leadership, mentoring, and innovation, with a focus on power optimization, timing closure, and scalable design

Qualifications

• 11+ years of experience with a Bachelor’s Degree in Computer Science/Engineering, or 9+ years with a Master’s Degree, or 7+ years with a Ph.D.

Responsibilities

• Shape full-chip and block-level implementation, including floorplanning, placement, routing, timing closure and signoff for complex GPU and SoC designs.
• Drive implementation strategies to achieve market-differentiating PPA targets, including power optimization and reliability considerations.
• Advance methodology and flow innovation, including automation, tool optimization and scalable design practices.
• Enable cross-functional collaboration with architecture, RTL, advanced design technology, software, system-level teams and vendors.
• Inspire high performance by mentoring junior engineers, fostering ownership and continual learning.

Job description

Samsung Electronics America, Inc. in Austin, TX, is seeking a Senior Staff GPU Physical Design Engineer to shape full-chip and block-level implementation, driving PPA targets across advanced-node GPUs and SoCs.

You’ll collaborate with architecture, RTL, design technology, software, and external vendors to resolve complex challenges and deliver high-quality silicon. The role emphasizes leadership, mentoring, and innovation, with a focus on power optimization, timing closure, and scalable design