Senior Staff Physical Design Feasibility Engineer

Samsung Semiconductor; Austin (TX); On-site; USD 180,200 - 270,400; Full time

Benefits offered by this job

Medical, dental, vision insurance

401(k)

Tuition assistance

Paid time off

Job summary

Samsung Semiconductor in Austin, Texas is seeking a Senior Staff Physical Design Feasibility Engineer to drive ASIC and interposer design performance, power, and area. This key role involves technical leadership and collaboration across teams to ensure design feasibility from initial planning to tape-out.

The ideal candidate will have over 10 years of experience and a relevant degree, along with strong scripting skills and a proven track record in high-quality design delivery.

At Samsung, you will enjoy a competitive pay range from $180,200 to $270,400, along with comprehensive benefits including medical, dental, and tuition assistance.

Qualifications

• 10+ years of experience with a Bachelor’s, 8+ years with a Master’s, or 6+ years with a PhD.
• Proven track record of high‑quality designs meeting PPA goals.
• Understanding of SOC/ASIC design flow and block‑level floor planning.

Responsibilities

• Drive overall performance, power, and area of ASIC designs.
• Collaborate with RTL designers to evaluate PPA.
• Lead synthesis, floor planning, and routing in chip-level environments.

Skills

Experience and expertise in ASIC and interposer designs

Proficient in scripting/programming languages (TCL, Perl, Python)

Ability to collaborate across teams

Strong communication and planning skills

Education

Bachelor’s degree in Computer Science/Computer Engineering or relevant field

Tools

P&R tools

Job description

Position Summary

Samsung, a world leader in advanced semiconductor technology, is founded on a simple philosophy – the endless pursuit of excellence will create a better world for all. At Samsung Austin Research and Development Center (SARC) and Advanced Computing Lab (ACL), we are building a center of excellence for Intellectual Property (IP) that is applied to high-performance computing devices (mobile, automotive, and other custom market segments) consumed by millions of people around the world. Come build with us!

Role and Responsibilities

As a Senior Staff Physical Design Feasibility Engineer, you will play a crucial role in driving the overall performance, power, and area (PPA) of complex ASIC and interposer designs, focusing on ensuring their feasibility and success from initial floor planning through to tape‑out and sign‑off. This senior‑level position involves providing technical leadership, collaborating across teams, and optimizing and validating GPU design modifications to meet critical timing, power, area, and reliability targets, all of which present exciting technical challenges.

• You will engage with architects within the IP and at the SoC level to drive architectural definition and deliver quality micro‑architectural level documentation.
• You will collaborate with RTL designers to evaluate PPA and drive improvement of new architectural features or RTL changes.
• You will be responsible for synthesis, floor planning, place & route in chip‑level and hierarchical physical implementation environments.
• You will produce and deliver RTL/netlist to GDS flow, meeting PPA goals and ensuring proper functionality.
• You will utilize Perl, TCL, Shell, and other script languages to automate design flows and improve efficiency.
• You will apply your knowledge of GPU design and integration flows, including CPU/GPU/ASIC physical design experience, to drive innovation and excellence in our designs.
• You possess strong communication skills, are a team player who thrives in a collaborative work environment, and have discipline and planning abilities that enable you to execute with high‑quality deliverables.

Skills and Qualifications

• 10+ years of experience with a Bachelor’s degree in Computer Science/Computer Engineering/relevant technical field, or 8+ years of experience with a Master’s degree, or 6+ years of experience with a PhD.
• Proven track record of delivering high‑quality designs that meet PPA goals and functionality requirements.
• Solid understanding of SOC/ASIC design flow utilizing the latest industry P&R tools.
• Experience in block‑level floor‑planning and PPA optimization.
• Knowledge of logical equivalence checking, timing constraints, and Verilog.
• Basic understanding of GPU architecture and data flow.
• Proficient scripting/programming skills in TCL, Perl, Shell, and/or Python.
• Knowledge of Electrical Engineering fundamentals, analytical aptitude, and excellent attention to detail.

Our Team

We’re strengthening our team of talented individuals with diverse skill sets to build a technology roadmap and deliver market‑leading GPU. Our Xclipse GPU is the first mobile GPU with ray‑tracing technology that enables console‑level graphics for Samsung Galaxy smartphones. With architecture scalability at the frontier of our design focus, our performance‑ and power‑optimized IP solution gets integrated into complex semiconductor products, aiming to reach multiple market segments.

Our Physical Design group is part of the larger Design Implementation team at SARC/ACL. The fast‑paced environment here provides us opportunities to learn different areas of design implementation and diversifying our technical expertise. We take pride in our highly collaborative team culture and feel supported by our leadership to explore new ideas and bring them to reality every day. We believe in connecting your area of expertise with the right level and functional discipline that can empower you to grow.

Total Rewards

At Samsung – SARC/ACL, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $180,200 and $270,400. Your actual base pay will depend on variables that may include your education skills, qualifications, experience, and work location.

Samsung employees have access to benefits including medical, dental, vision, life insurance, 401(k), onsite lunch, employee purchase program, tuition assistance (after 6 months), paid time off, student loan program, wellness incentives, and many more. In addition, regular full‑time employees (salaried or hourly) are eligible for MBO bonus compensation, based on company, division, and individual performance. Additionally, this role might be eligible to participate in long‑term incentive plan and relocation.

This is an exempt position, which is not eligible for overtime pay under the Fair Labor Standards Act (FLSA).

U.S. Export Control

This position requires the ability to access information subject to U.S. export control restrictions. Applicants must have the ability to access export‑controlled information or be eligible to receive a government authorization to access export‑controlled information.

Trade Secrets

By submitting an application, you agree not to disclose to Samsung, or induce Samsung to use, any confidential or proprietary information (including trade secrets) belonging to any current or previous employer or other person or entity.

Equal Employment Opportunity

• Samsung Electronics America, Inc. and its subsidiaries are committed to employing a diverse workforce, and provide Equal Employment Opportunity for all individuals regardless of race, color, religion, gender, age, national origin, marital status, sexual orientation, gender identity, status as a protected veteran, genetic information, status as a qualified individual with a disability, or any other characteristic protected by law.