Senior Staff CAD Engineer - Physical Design for GPU/SoC

Samsung Semiconductor; San Jose (CA); On-site; USD 180,200 - 297,200; Full time

Benefits offered by this job

Medical insurance

Dental insurance

Vision insurance

Life insurance

401(k)

Job summary

Samsung Semiconductor is seeking a Senior Staff Physical Implementation CAD Engineer to shape physical design CAD flows for high‑performance GPU and SoC designs at advanced nodes. You will lead synthesis, placement, routing, timing, and power optimization, and mentor engineers across teams in a fast‑paced, global environment.

Based in San Jose, CA, you will collaborate with design, DTCO, and external EDA partners, drive automation with Python/Tcl, and contribute to AI‑assisted methodologies to

Qualifications

• 11+ years in Physical Design CAD, or 9+ with a Master’s, or 7+ with Ph.D.
• 11+ years hands‑on in Physical Design for GPU/CPU/SoC programs.
• Deep experience with P&R, timing closure, power optimization, and signoff.
• Strong scripting/automation in Python, Tcl, shell.

Responsibilities

• Define and evolve next‑gen physical design flows across cells, blocks and nodes.
• Provide leadership and hands‑on support to project teams for flow triage.
• Champion automation and infrastructure, building tools and AI‑assisted methodologies.
• Collaborate with internal design/DTCO teams and external EDA partners.
• Mentor junior engineers and drive innovative CAD methodologies.

Skills

Physical design CAD

Scripting & automation

Leadership/mentoring

Cross‑functional collaboration

Python/Tcl/shell

DTCO & PPA

Team coordination

Communication skills

Education

Bachelor’s degree in CS/Engineering

Master’s degree (optional)

Ph.D. (optional)

Tools

Cadence P&R

Synopsys P&R

Calibre/ICV

Job description

Samsung Semiconductor is seeking a Senior Staff Physical Implementation CAD Engineer to shape physical design CAD flows for high‑performance GPU and SoC designs at advanced nodes. You will lead synthesis, placement, routing, timing, and power optimization, and mentor engineers across teams in a fast‑paced, global environment.

Based in San Jose, CA, you will collaborate with design, DTCO, and external EDA partners, drive automation with Python/Tcl, and contribute to AI‑assisted methodologies to