Senior SRAM Design Engineer – High-Performance Memory

Samsung Electronics America

San Jose (CA)

On-site

USD 163,000 - 253,000

Full time

5 days ago
Be an early applicant

Get a reply from this employer

Your resume and cover letter, tailored to exactly what they’re hiring for.

Get past ATS filters

Benefits offered by this job

4+ weeks PTO
Fertility/adoption stipend
Caregiver support
Medical travel support
Onsite café and gym

Job summary

Samsung Semiconductor seeks a Staff Engineer to lead SRAM circuit design, driving end-to-end development of high-performance, low-power memory blocks for cutting-edge devices. You will mentor engineers, optimize design methodologies, and collaborate with product, test, and layout teams.

The role requires 10+ years in SRAM/memory circuits, mastery of advanced nodes, and strong scripting for automation. Competitive pay and comprehensive benefits accompany this leadership position.

Qualifications

  • 10+ years in SRAM or memory circuit design, with advanced nodes experience.
  • Strong knowledge of FinFET/GAA/SOI process tech.
  • Expertise in SRAM architecture and low-power techniques; memory compiler experience.

Responsibilities

  • Design and develop SRAM memory arrays and related circuits for 2nm–5nm nodes.
  • Optimize SRAM for performance, power and area; develop layouts and verify with DRC/LVS.
  • Create test plans with product and test teams; support silicon bring-up.
  • Mentor junior engineers and share SRAM design best practices.
  • Run extensive circuit simulations using HSPICE and Spectre to validate performance.

Skills

SRAM design
Memory circuits
Circuit simulation
HSPICE
Cadence Spectre
Python scripting
Mentoring
Layout design

Education

Bachelor's degree in electrical engineering
Master's degree in electrical engineering

Tools

Spectre
HSPICE
Cadence Virtuoso

Job description

Samsung Semiconductor seeks a Staff Engineer to lead SRAM circuit design, driving end-to-end development of high-performance, low-power memory blocks for cutting-edge devices. You will mentor engineers, optimize design methodologies, and collaborate with product, test, and layout teams.

The role requires 10+ years in SRAM/memory circuits, mastery of advanced nodes, and strong scripting for automation. Competitive pay and comprehensive benefits accompany this leadership position.

Get your free, confidential resume review.

or drag and drop your file here.

Similar jobs

Similar jobs worth comparing

Lead SRAM Design Engineer – High-Performance Memory
Lead SRAM Design Engineer – High-Performance Memory

Samsung Semiconductor Inc. • San Jose (CA)

On-site
USD 163,000 - 253,000
4+ weeks paid time off
Charitable giving match
Fertility/adoption stipend
+2
Senior Analog SRAM Design Architect - High-Impact Role
Senior Analog SRAM Design Architect - High-Impact Role

Microchip Technology Inc. • San Jose (CA)

On-site
USD 91,000 - 232,000
Health benefits beginning day one
Retirement savings plan (401k)
Employee stock purchase plan (ESPP)
Senior SOC Design Engineer, Memory & SoC Architect
Senior SOC Design Engineer, Memory & SoC Architect

Samsung Semiconductor • San Jose (CA)

On-site
USD 219,000 - 351,000
4+ weeks PTO
Onsite Café & gym
Flexible work policy
+2
Staff Engineer, SRAM Circuit Design
Staff Engineer, SRAM Circuit Design

Samsung Semiconductor Inc. • San Jose (CA)

On-site
USD 163,000 - 253,000
4+ weeks paid time off
Charitable giving match
Fertility/adoption stipend
+2
Senior SRAM Engineer, Circuit Design
Senior SRAM Engineer, Circuit Design

Ladders • United States

Remote
USD 168,000 - 311,000
Equity options
Comprehensive benefits package
Hybrid work model
+3
Senior SoC Design Architect for Next-Gen Memory
Senior SoC Design Architect for Next-Gen Memory

Samsung Semiconductor Inc. • San Jose (CA)

On-site
USD 219,000 - 351,000
Memory Tech Leader: DRAM Circuit Design Principal
Memory Tech Leader: DRAM Circuit Design Principal

Samsung Electronics America • San Jose (CA)

On-site
USD 219,000 - 351,000
Senior SRAM Design Engineer for High-Performance CPU
Senior SRAM Design Engineer for High-Performance CPU

Qualcomm • Austin (TX)

On-site
USD 179,000 - 268,400
Competitive annual discretionary bonus
RSU grants
Comprehensive benefits package
Senior SOC Design Engineer – Memory & SoC
Senior SOC Design Engineer – Memory & SoC

Samsung-Semiconductor • San Jose (CA)

On-site
USD 219,000 - 351,000
4+ weeks paid time off
Medical/Dental/Vision/401k
Fertility/adoption support
+2
SRAM Design & Layout Engineer - High-Performance Memory
SRAM Design & Layout Engineer - High-Performance Memory

QUALCOMM, Inc. • Santa Clara (CA)

On-site
USD 148,000 - 222,000