Memory Tech Leader: DRAM Circuit Design Principal

Samsung Electronics America; San Jose (CA); On-site; USD 219,000 - 351,000; Full time

Job summary

Samsung Electronics America is seeking a Principal Engineer in DRAM Circuit Design to lead next-generation memory architecture at the San Jose campus onsite five days a week with an average travel of 10%. You will collaborate with process integration, device modeling, and cross-functional teams to advance memory technology while delivering design specifications and performance analyses.

The role offers a competitive salary and comprehensive benefits as part of Samsung’s commitment to innovation

Qualifications

• BS with 18+ years DRAM design engineering or MS with 15+ years or PhD with 12+ years in semiconductor field experience preferred.
• Preferred knowledge, achievements, and skillsets in memory design.
• Proficient with design software and statistical analysis tools.
• Inclusive, adapt your style to the situation and diverse global norms of our people.
• An avid learner, you approach challenges with curiosity and resilience, seeking data to help build understanding.
• You’re collaborative, building relationships, humbly offering support and openly welcoming approaches.
• Innovative and creative, you proactively explore new ideas and adapt quickly to change

Responsibilities

• Develop DRAM architecture and optimize floor plan for next generation DRAM
• Develop the Row, Column Bank circuit design, Data path and related test modes
• Identify device requirements for the advanced memory product design
• Collaborate with process integration, device modeling group for DRAM design architecture/circuit development and technology optimization
• Characterize power delivery network related performance and optimize the circuit and architecture
• Analyze electrical data from Si and validate new core design architecture performance
• Engage with cross-function teams such as process integration, quality assurance and product engineers
• Documentation for design specification, performance analysis and test plan etc.
• Technical interactions with internal and external customers.
• Complete other responsibilities as assigned.

Skills

DRAM design

Memory design

Design software

Statistical analysis

Cross-functional collaboration

Adaptability

Education

Bachelor's degree in semiconductor field

Master's degree in semiconductor field

PhD in semiconductor field

Tools

Design software

Statistical analysis tools

Job description

Samsung Electronics America is seeking a Principal Engineer in DRAM Circuit Design to lead next-generation memory architecture at the San Jose campus onsite five days a week with an average travel of 10%. You will collaborate with process integration, device modeling, and cross-functional teams to advance memory technology while delivering design specifications and performance analyses.

The role offers a competitive salary and comprehensive benefits as part of Samsung’s commitment to innovation