Lead SRAM Design Engineer – High-Performance Memory

Samsung Semiconductor Inc.

San Jose (CA)

On-site

USD 163,000 - 253,000

Full time

14 days+

Get more replies from employers

Send a job-specific resume in minutes.

Benefits offered by this job

4+ weeks paid time off
Charitable giving match
Fertility/adoption stipend
Medical travel support
Onsite cafe & gym

Job summary

Samsung Semiconductor, Inc. seeks a Staff Engineer to lead end-to-end SRAM circuit design for next-generation memory solutions. You will drive design of SRAM arrays, bit cells, decoders and sense amps across cutting-edge process nodes, while mentoring junior engineers and shaping design methodologies.

You will optimize performance, power and area, develop layouts, and run extensive simulations to ensure silicon success, contributing to patents and industry advancements.

Qualifications

  • Bachelor's in EE with 10+ years, or Master's with 8+ years preferred.
  • Experience in SRAM or memory circuit design on advanced nodes.
  • Strong device physics understanding and process technology knowledge.
  • Expertise in SRAM architecture including bitcells, sense amps, drivers and read/write paths.
  • Proficiency with circuit simulation and variation analysis.
  • Scripting in Python, Perl, TCL for design automation.

Responsibilities

  • Design and develop SRAM memory arrays with bit cells, sense amplifiers, decoders and control circuits for advanced nodes (2nm–5nm).
  • Optimize SRAM for performance, power and area, and improve yield.
  • Develop layouts and perform DRC/LVS, verify physical design.
  • Evaluate speed/power/area trade-offs to meet targets.
  • Create design methodologies and automation scripts for design and verification.
  • Collaborate with product/test teams to support silicon bring-up.
  • Mentor junior engineers on SRAM design techniques.
  • Perform extensive circuit simulations with HSPICE, Spectre to validate functionality.
  • Contribute to patents and papers to advance SRAM tech.

Skills

SRAM design
HSPICE
Cadence Spectre
layout design
Python scripting
team leadership
memory architecture
DFM

Education

Bachelor's degree in Electrical Engineering
Master's degree in Electrical Engineering

Tools

HSPICE
Cadence Virtuoso
Cadence Spectre
DRC/LVS

Job description

Samsung Semiconductor, Inc. seeks a Staff Engineer to lead end-to-end SRAM circuit design for next-generation memory solutions. You will drive design of SRAM arrays, bit cells, decoders and sense amps across cutting-edge process nodes, while mentoring junior engineers and shaping design methodologies.

You will optimize performance, power and area, develop layouts, and run extensive simulations to ensure silicon success, contributing to patents and industry advancements.

Get your free, confidential resume review.
or drag and drop your file here.
Similar jobs

Similar jobs worth comparing

Staff SRAM Design Lead — High-Performance, Low-Power Memory
Staff SRAM Design Lead — High-Performance, Low-Power Memory

Samsungsemiconductor • San Jose (CA)

On-site
USD 163,000 - 253,000
Medical, Dental, Vision
401(k)
Paid time off: 4+ weeks per year
Principal SRAM Circuit Design Engineer
Principal SRAM Circuit Design Engineer

Samsung Semiconductor • San Jose (CA)

On-site
USD 163,000 - 253,000
Medical benefits
401(k)
Generous paid time off
+1
Staff Engineer, SRAM Circuit Design
Staff Engineer, SRAM Circuit Design

Samsung Semiconductor • San Jose (CA)

On-site
USD 163,000 - 253,000
Medical benefits
401(k)
Generous paid time off
+1
Staff Engineer, SRAM Circuit Design
Staff Engineer, SRAM Circuit Design

Samsungsemiconductor • San Jose (CA)

On-site
USD 163,000 - 253,000
Medical, Dental, Vision
401(k)
Paid time off: 4+ weeks per year
Staff Engineer, SRAM Circuit Design
Staff Engineer, SRAM Circuit Design

Samsung Semiconductor Inc. • San Jose (CA)

On-site
USD 163,000 - 253,000
4+ weeks paid time off
Charitable giving match
Fertility/adoption stipend
+2
Senior Embedded Firmware Engineer – Memory Solutions
Senior Embedded Firmware Engineer – Memory Solutions

Samsung Semiconductor Inc. • San Jose (CA)

On-site
USD 138,000 - 206,000
4+ weeks of paid time off
Charitable giving match
Onsite café and gym
Senior SoC Architect: Fabric, Cache & DRAM Controller
Senior SoC Architect: Fabric, Cache & DRAM Controller

Samsung Research America • Mountain View (CA)

On-site
USD 272,489,280 - 408,596,160
Lead Memory-Centric SoC Physical Design Engineer
Lead Memory-Centric SoC Physical Design Engineer

Samsung Semiconductor • San Jose (CA)

On-site
USD 138,000 - 206,000
Onsite Café and gym
Flexible work environment
Comprehensive benefits
Senior SRAM Circuit Design Engineer - Equity & Production IP
Senior SRAM Circuit Design Engineer - Equity & Production IP

NVIDIA • California (MO)

On-site
USD 168,000 - 265,000
Staff Engineer: High-Speed Analog & Mixed-Signal IC Design
Staff Engineer: High-Speed Analog & Mixed-Signal IC Design

Samsung Semiconductor • United States

On-site
USD 152,000 - 253,000
Medical/Dental/Vision
401k
Flexible benefits