Senior SoC Verification Engineer for AI Connectivity & Emulation

Astera Labs

San Jose (CA)

On-site

USD 165,000 - 195,000

Full time

4 days ago

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Job summary

Astera Labs, a leader in AI connectivity solutions, seeks a Senior SoC Verification/Validation Engineer to validate complex SoCs for AI connectivity and cloud infrastructure on industry-leading emulation platforms. You will work across Architecture, Design, Verification, and SW/FW teams to ensure functionality and performance before silicon tape-out.

The role requires 5+ years in pre-silicon verification, strong debugging, and proficiency in SystemVerilog, C/C++, and Python.

Qualifications

BS/MS in Electrical Engineering, Computer Engineering, or related field.
5+ years of hands-on experience in pre-silicon verification/validation.
Strong hands-on experience in running and debugging SOC simulation.
Proficiency in high-speed protocols such as PCIe, UALink, Ethernet.
Programming in System Verilog, C/C++, Python.
Strong debugging and analytical skills.
Excellent communication and independent work ability.

Responsibilities

Develop complex SoCs for AI connectivity and cloud infrastructures.
Bring up and validate high-speed interfaces like PCIe, Ethernet, UALink, and overall SoC functionality.
Collaborate with Architecture, Design, Verification, and SW/FW teams to define validation plans.
Develop C/C++ FW and tests to validate test plans.
Build tools and methodologies to validate and debug HW and SW/FW on the emulation platform.