Senior Principal Test Engineer — AI Connectivity HW Expert

Astera Labs; San Jose, Northern (CA, KY); Hybrid; USD 205,000 - 260,000; Full time

Job summary

Astera Labs is seeking a Senior Principal Test Engineer to serve as a technical authority for test engineering across mixed-signal silicon and high-speed connectivity products. You will define Test strategies for SCM High Volume Manufacturing and Validation Boards shipped to customer development and own execution from early product engagement through high-volume manufacturing.

This role is central to delivering reliable, scalable connectivity for rack-scale AI infrastructure.

Qualifications

• Bachelor's degree in Electrical Engineering, Computer Engineering, or related technical field.
• 12–20 years of experience in Test engineering or Product Engineering from development through high-volume manufacturing.
• Strong experience developing custom test solutions for high-speed, mixed-signal products for high volume manufacturing.
• Working knowledge of high-speed protocols and physical-layer behavior, including PCIe, Ethernet, DDR, NVMe, or USB.
• Experience with Test SW development, production debug, and test-time optimization.
• Proven experience developing and designing custom Test Hardware for PCBA High volume manufacturing.
• Master’s or PhD in Electrical Engineering, Computer Engineering, or a related field.

Responsibilities

• Define and own comprehensive test strategies, specifications, and plans from product definition through high-volume production.
• Establish coverage, quality, yield, test-time, and cost objectives, and drive measurable improvements across the product lifecycle.
• Partner with design and product engineering teams to identify testability requirements and make effective design-for-test tradeoffs.
• Architect tester solutions and guide development of Tester HW design to meet roadmap of products.
• Validate Tester Designs and characterize before implementing into Mass Production.
• Apply understanding of physical-layer behavior to investigate failures, interpret lab and production data, and resolve complex performance issues.
• Lead root-cause analysis and yield improvement using protocol analyzers, oscilloscopes, manufacturing data, and structured failure analysis.
• Technical Leadership and Cross-Functional Execution across test, DFT, design, operations, quality, and external manufacturing organizations.
• Mentor engineers, influence technical decisions, and communicate risks, tradeoffs, and recommendations to cross-functional stakeholders.

Skills

Test engineering

High-speed protocols

C/C++

Python

DFT techniques

Education

Bachelor's degree in Electrical Engineering

Master's or PhD in Electrical Engineering (preferred)

Tools

Oscilloscopes

Protocol analyzers

Test automation tooling

Job description

Astera Labs is seeking a Senior Principal Test Engineer to serve as a technical authority for test engineering across mixed-signal silicon and high-speed connectivity products. You will define Test strategies for SCM High Volume Manufacturing and Validation Boards shipped to customer development and own execution from early product engagement through high-volume manufacturing.

This role is central to delivering reliable, scalable connectivity for rack-scale AI infrastructure.