Senior Emulation Architect for SoC Validation

Astera Labs; San Jose (CA); On-site; USD 207,000 - 230,000; Full time

Job summary

Astera Labs in San Jose, CA is seeking a Principal Emulation Engineer to build and operate emulation environments for validating complex ASICs before silicon. You will partner with design, verification, firmware, and systems engineers to model hardware-software interactions, stress-test high-speed protocols, and drive pre-silicon validation.

This senior role requires leadership, hands-on debugging, and translating system requirements into practical emulation scenarios.

Qualifications

• Bachelor’s degree in Electrical/Electronic Engineering, Computer Engineering, CS.
• 8–12 years of experience in SoC/silicon verification or development.
• Experience with SoC hardware/software interfaces and complex protocols.
• Strong SystemVerilog and verification environment skills.
• Proficient in Python/Perl/C, and debugging methodologies.

Responsibilities

• Build and maintain emulation environments for complex ASICs/SoCs.
• Integrate RTL, transactors, models, software, and test infra for co-simulation.
• Enable stress-testing of designs with scalable, repeatable workflows.
• Develop reusable models, utilities, and debug methods for pre-silicon validation.
• Verify hardware/software interfaces in collaboration with design and firmware teams.

Skills

SystemVerilog

Python

C

Perl

Debugging

Prioritization

Education

Bachelor’s degree in Electrical Engineering, Computer Engineering, Computer Science

Master’s degree preferred

Tools

Palladium

Zebu

Veloce

HAPS

FPGA prototyping

Job description

Astera Labs in San Jose, CA is seeking a Principal Emulation Engineer to build and operate emulation environments for validating complex ASICs before silicon. You will partner with design, verification, firmware, and systems engineers to model hardware-software interactions, stress-test high-speed protocols, and drive pre-silicon validation.

This senior role requires leadership, hands-on debugging, and translating system requirements into practical emulation scenarios.