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Quadric in Burlingame, CA is hiring a Senior SoC Design Verification Engineer to help architect and build our end-to-end verification environment for GPNPU-based SoCs. You will lead testbench development, collaborate with architects, HW, and SW, and ensure high coverage before tape-out.
The role demands 5+ years in complex SoC verification, deep UVM expertise, SystemVerilog/Verilog, and Python scripting. We expect hands-on verification of NoC, PCIe/UCIe, and DDR IP, plus experience with VCS and
Quadric in Burlingame, CA is hiring a Senior SoC Design Verification Engineer to help architect and build our end-to-end verification environment for GPNPU-based SoCs. You will lead testbench development, collaborate with architects, HW, and SW, and ensure high coverage before tape-out.
The role demands 5+ years in complex SoC verification, deep UVM expertise, SystemVerilog/Verilog, and Python scripting. We expect hands-on verification of NoC, PCIe/UCIe, and DDR IP, plus experience with VCS and