Senior SOC Fabric & Interconnect Verification Engineer

NVIDIA; Town of Montana (WI); On-site; USD 168,000 - 311,000; Full time

Benefits offered by this job

Equity

Benefits package

Job summary

NVIDIA seeks a Senior Custom SoC/IP Verification Engineer to verify next-gen SoCs and IPs, focusing on fabric and interconnect verification across IP and full-chip levels. Expertise in SystemVerilog, UVM, and NoC architectures is required.

Candidate will work with Architecture, SW/FW, Design, Modeling, Emulation, and Post-Silicon teams to ensure robust verification plans and execution. Equity and comprehensive benefits are offered.

Qualifications

• B.S./M.S. in Computer or Electrical Engineering or related field.
• 8+ years in ASIC verification with fabric/interconnect/NoC focus at IP and full-chip levels.
• Strong SystemVerilog and UVM knowledge.
• Experience with AMBA AXI/CHI protocols and interconnect semantics.

Responsibilities

• Verify ASIC fabric and interconnect IP blocks and full chip integration.
• Develop test plans for fabric and interconnect verification in UVM environments.
• Design constrained-random and directed SystemVerilog testbenches for NoC topologies.
• Collaborate with Architecture, SW/FW, Design, Modeling, Emulation, and Post-Silicon Validation teams.
• Drive silicon and platform verification strategies for fabric subsystems.

Skills

SystemVerilog

UVM

AMBA AXI

CHI

Python

Perl

TCL

Education

B.S. or M.S. in Computer/Electrical Engineering or related field

Tools

Testbenches

Job description

NVIDIA seeks a Senior Custom SoC/IP Verification Engineer to verify next-gen SoCs and IPs, focusing on fabric and interconnect verification across IP and full-chip levels. Expertise in SystemVerilog, UVM, and NoC architectures is required.

Candidate will work with Architecture, SW/FW, Design, Modeling, Emulation, and Post-Silicon teams to ensure robust verification plans and execution. Equity and comprehensive benefits are offered.