Senior SoC DV Engineer – Pre-Silicon DDR/NoC (Hybrid)

Tenstorrent Inc.; Boston, Santa Clara (MA, CA); Hybrid; USD 100,000 - 500,000; Full time

Job summary

Tenstorrent is seeking a SoC Design Verification Engineer to lead pre-silicon verification of the Beowulf SoC, focusing on the Compute Subsystem, DDR memory, and Fabric NoC. This role is hybrid, based out of Boston, MA; Toronto, ON; or Santa Clara, CA.

We welcome candidates at various experience levels; offers will align with that level, which may differ from the posting. You will collaborate with architecture, RTL, firmware, emulation, and system teams to ensure silicon success.

Qualifications

• Deep expertise in UVM, SystemVerilog, and coverage-driven verification.
• Experience verifying compute subsystems, DDR controllers, and NoC interconnects.
• Proficient in Python, C/C++, Tcl; familiar with verification automation tools.
• Strong cross-functional collaboration and debugging skills.
• Comfortable with reset, power management, and high-concurrency scenarios.

Responsibilities

• Develop and own scalable pre-silicon verification environments for CSS, DDR, and Fabric NoC.
• Write and execute test scenarios for compute operation, memory traffic, and coherency.
• Analyze coverage gaps, debug failures, and drive root-cause analysis with multiple teams.
• Plan regression quality, coverage closure, and signoff for major SoC features.
• Automate verification flows with scripting and reusable infrastructure.
• Mentor engineers and contribute to verification methodology.

Skills

UVM

SystemVerilog

Coverage-driven verification

Assertions

Debug

Python

C/C++

Tcl

Tools

CocoTB

Job description

Tenstorrent is seeking a SoC Design Verification Engineer to lead pre-silicon verification of the Beowulf SoC, focusing on the Compute Subsystem, DDR memory, and Fabric NoC. This role is hybrid, based out of Boston, MA; Toronto, ON; or Santa Clara, CA.

We welcome candidates at various experience levels; offers will align with that level, which may differ from the posting. You will collaborate with architecture, RTL, firmware, emulation, and system teams to ensure silicon success.