Staff Engineer, SoC Verification MultiChip

Tenstorrent; California (MO); Hybrid; USD 100,000 - 140,000; Full time

Benefits offered by this job

Competitive compensation package

Benefits

Equal opportunity employer

Job summary

A leading AI technology company is seeking a SoC Verification Engineer to lead verification efforts for complex multi-chip systems. The position requires experience with SystemVerilog, verification plans, and collaboration with design teams. Ideal candidates will be proactive and skilled in AI-assisted tools. This hybrid position welcomes applicants at various experience levels.

Qualifications

• Experienced in SystemVerilog, SV-UVM, Python, and testbench architecture design.
• Skilled in creating and executing detailed verification plans.
• Proactive engineer capable of owning complex verification areas.

Responsibilities

• Develop simulation, emulation, and formal verification infrastructure.
• Own and execute verification plans for SoC and chiplet systems.
• Triage, analyze, and debug failures with design teams.

Skills

SystemVerilog

SV-UVM

Python

CocoTB

AI-assisted coding

Job description

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors.

Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities.

Tenstorrent is seeking a SoC Verification Engineer to lead simulation, emulation, and formal verification for complex multi-chip and package-level systems. In this role, you’ll design infrastructure, own verification plans, and drive debug efforts across advanced SoC and chiplet architectures. You’ll also apply AI-assisted tools to accelerate verification productivity and innovation.

This role is hybrid, based out of Boston, Toronto, Ottawa or Santa Clara. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting.

Who You Are

• Experienced in SystemVerilog, SV-UVM, Python, and testbench architecture design (CocoTB a plus).
• Skilled in creating and executing detailed verification plans across multiple methodologies.
• Familiar with AI-assisted coding and debug tools (Copilot, Cursor, Claude).
• Proactive engineer who can take ownership of complex verification areas in a multi-chip environment.

What We Need

• Develop simulation, emulation, and formal verification infrastructure and methodologies.
• Own and execute verification plans for SoC, chiplet, and package-level systems.
• Triage, analyze, and debug failures in collaboration with cross-functional design teams.
• Drive use of AI tools to enhance test generation, debug, and coverage closure.

What You Will Learn

• Hands-on experience with advanced multi-die and package-level verification flows.
• Exposure to Synopsys Distributed Simulation and hardware co-simulation techniques.
• Broaden expertise in emulation platforms and co-simulation with real workloads.
• Learn how AI-driven verification accelerates productivity in complex SoC development.

Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer.

This offer of employment is contingent upon the applicant being eligible to access U.S. export-controlled technology.