Senior SoC DFT Engineer for High-Impact ASIC

Nokia Corp.; San Jose (CA); Hybrid; USD 160,000 - 297,000; Full time

Job summary

Nokia Corp. is seeking a Principal DFT Engineer to drive ASIC DFT implementations for the Network Infrastructure Optical Network group.

You will own DFT insertion end-to-end from RTL to post-silicon, collaborating with architecture, IP design, Physical Design and product engineers to achieve first-pass silicon success. Hands-on DFT implementation and verification across BIST, MBIST, BISR, Boundary Scan and JTAG are required, with strong TCL scripting and test coverage focus.

Qualifications

• Bachelor's degree in computer science, Electrical Engineering or related fields with 8+ years of experience OR Master’s/PhD with 5+ years.

Responsibilities

• Lead DFT insertion from RTL/netlist through post-silicon debug.
• Perform DFT implementation and verification across BIST, MBIST, BISR, boundary scan and JTAG.
• Develop and validate DFT timing constraints for scan, BIST, and test modes.
• Create TCL scripts to automate DFT insertion, verification and analysis flows.
• Collaborate with RTL, IP design, Physical Design and product engineers to resolve DFT issues and drive first-pass silicon success.

Skills

DFT implementation

Logic BIST

MBIST

BISR

Boundary Scan

JTAG

ATPG

TCL scripting

Timing constraints

Debugging

Education

Bachelor's degree in CS/EE

Master's/PhD in CS/EE

Tools

EDA tools

IP/BBIST tools

Job description

Nokia Corp. is seeking a Principal DFT Engineer to drive ASIC DFT implementations for the Network Infrastructure Optical Network group.

You will own DFT insertion end-to-end from RTL to post-silicon, collaborating with architecture, IP design, Physical Design and product engineers to achieve first-pass silicon success. Hands-on DFT implementation and verification across BIST, MBIST, BISR, Boundary Scan and JTAG are required, with strong TCL scripting and test coverage focus.