Senior RTL Engineer, DRAM Digital & Mixed-Signal

Micron Technology; Boise (ID); On-site; USD 120,000 - 160,000; Full time

Benefits offered by this job

Health insurance

Dental plan

Vision plan

Paid time off

Paid holidays

Job summary

Micron Technology is seeking a Senior RTL Engineer in Boise to build and develop DRAM RTL blocks. You will support the RTL lifecycle from specification through signoff and collaborate with multi-functional teams to meet PPA targets in a memory-focused environment.

The role requires strong Verilog/SystemVerilog, RTL design experience for complex digital IP, and expertise in low-power methods (UPF) and timing analysis. Hybrid collaboration with design teams is expected.

Qualifications

• Master’s degree in Electrical Engineering with 4+ years of experience, or Bachelor’s with 5+ years of pre-silicon RTL design experience.
• Hands-on experience developing RTL for complex digital IP from specification through implementation handoff.
• Experience with ASIC low-power design methodologies, including UPF and CDC/RDC analysis.
• Strong knowledge of ASIC design flows: RTL, synthesis, verification, and static timing analysis.
• Proficiency in Verilog/SystemVerilog and industry-standard RTL simulation tools.

Responsibilities

• Contribute to RTL build of digital and mixed-signal components for DRAM using RTL-to-GDS flows.
• Implement and document high-performance, power- and area-efficient RTL designs meeting product specifications.
• Perform front-end quality checks including lint, CDC/RDC, synthesis, UPF, and timing QoR.
• Collaborate with physical design and implementation teams to achieve timing closure and PPA goals.
• Apply power-, clock-, and implementation-aware RTL design practices to minimize silicon risk.

Skills

RTL design

Verilog/SystemVerilog

ASIC low-power design

CDC/RDC analysis

Timing analysis

RTL verification

Synthesis

Education

Master’s degree in Electrical Engineering

Bachelor’s degree in Electrical Engineering

Tools

RTL simulation tools

Job description

Micron Technology is seeking a Senior RTL Engineer in Boise to build and develop DRAM RTL blocks. You will support the RTL lifecycle from specification through signoff and collaborate with multi-functional teams to meet PPA targets in a memory-focused environment.

The role requires strong Verilog/SystemVerilog, RTL design experience for complex digital IP, and expertise in low-power methods (UPF) and timing analysis. Hybrid collaboration with design teams is expected.