Boise-based RTL Design Lead — DRAM IP, PPA Focus

Micron Technology, Inc; Boise (ID); On-site; USD 120,000 - 160,000; Full time

Benefits offered by this job

Medical, dental and vision plans

Paid family leave

Robust paid time-off program

Job summary

Micron Technology, Inc is looking for a Principal RTL Design Engineer in Boise, Idaho, to lead the full RTL design lifecycle for DRAM digital and mixed-signal IP. This role involves owning the design from specification to silicon-ready signoff, delivering high-performance and area-efficient designs.

The ideal candidate will have significant RTL design experience and a graduate degree in Electrical Engineering. Offering great benefits and opportunities for innovation and collaboration are core to this role.

Qualifications

• 8+ years of experience in pre-silicon RTL design or 10+ years with a bachelor's.
• Proven ownership of complex RTL/IP development.
• Strong knowledge of low-power design methodologies.

Responsibilities

• Own and drive RTL design for DRAM digital and mixed-signal IP.
• Collaborate with physical design and verification teams.
• Perform front-end quality checks and sign offs.

Skills

RTL design

Power-aware design methodologies

Verilog/SystemVerilog proficiency

Education

Master’s degree in Electrical Engineering

Bachelor’s degree

Tools

Static Timing Analysis (STA)

Industry-standard front-end tools

Job description

Micron Technology, Inc is looking for a Principal RTL Design Engineer in Boise, Idaho, to lead the full RTL design lifecycle for DRAM digital and mixed-signal IP. This role involves owning the design from specification to silicon-ready signoff, delivering high-performance and area-efficient designs.

The ideal candidate will have significant RTL design experience and a graduate degree in Electrical Engineering. Offering great benefits and opportunities for innovation and collaboration are core to this role.