Senior RTL Design Engineer - DRAM & Low-Power ASIC
Micron Technology, Inc
Boise (ID)
On-site
USD 100,000 - 130,000
Full time
14 days+
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Benefits offered by this job
Medical, dental, and vision plans
Robust paid time-off program
Paid family leave
Job summary
Micron Technology, Inc in Boise, Idaho is looking for a Senior RTL Engineer to develop DRAM digital and mixed-signal blocks. You will support the RTL lifecycle from specification to signoff, implementing designs that meet power, performance, and area (PPA) targets. Required qualifications include a Master's degree in Electrical Engineering with 4+ years of experience or a Bachelor's degree with 5+ years of RTL design experience. Join us for a role that fosters innovation and collaboration in a thriving engineering environment.
Qualifications
Master's with 4+ years or Bachelor's with 5+ years in RTL design.
Experience developing RTL for complex digital IP.
Hands-on experience with ASIC design flows.
Responsibilities
Contribute to RTL builds for DRAM components.
Implement and document efficient RTL designs.
Collaborate with physical design teams on PPA goals.
Skills
RTL design
Verilog/SystemVerilog
ASIC low-power design methodologies
CDC/RDC analysis
Education
Master's degree in Electrical Engineering
Bachelor's degree in Electrical Engineering
Tools
Industry-standard RTL simulation tools
Job description
Micron Technology, Inc in Boise, Idaho is looking for a Senior RTL Engineer to develop DRAM digital and mixed-signal blocks. You will support the RTL lifecycle from specification to signoff, implementing designs that meet power, performance, and area (PPA) targets. Required qualifications include a Master's degree in Electrical Engineering with 4+ years of experience or a Bachelor's degree with 5+ years of RTL design experience. Join us for a role that fosters innovation and collaboration in a thriving engineering environment.