Senior RTL Design & FPGA Integration Engineer

Advanced Micro Devices, Inc.; San Jose (CA); Hybrid; USD 150,000 - 210,000; Full time

Job summary

Advanced Micro Devices, Inc. seeks a seasoned FPGA/RTL engineer to contribute to adaptive and embedded computing programs.

You will work across time zones with architects, hardware and SW-FW teams to translate product concepts into silicon-ready RTL designs. You will apply modern RTL methods, leverage AI-driven automation, and support PPA, cost and schedule optimization for first-time-right silicon and software solutions.

Qualifications

• Experience in RTL design (Verilog/SystemVerilog) for FPGA/ASIC.
• Understanding of VLSI design flow from RTL to physical design.
• Familiarity with floorplanning, synthesis, place & route, STA.
• Knowledge of UVM/OVM verification and debugging.
• Proficiency in scripting (Perl, Tcl, Python, Shell) for design automation.

Responsibilities

• Collaborate with architects, hardware engineers, and SW-FW engineers to understand product requirements and IP features.
• Build early-stage RTL designs based on product and architecture intent driving Silicon and Solution co-development.
• Build and enhance AI-driven infrastructure to accelerate IP integration and improve development timelines.
• Apply data-driven methodologies to align engineering teams across next-generation products and technology nodes.
• Support functional simulation and software quality checks, ensuring robust verification coverage.
• Partner with global teams to achieve seamless integration and delivery.

Skills

RTL design

Verilog/SystemVerilog

Digital/Analog block

collaboration

communication

design automation scripting

Education

Bachelor’s or Master’s in Computer Engineering or Electrical Engineering

Tools

Synopsys Design Compiler

Primetime

VCS

Cadence Virtuoso

Job description

Advanced Micro Devices, Inc. seeks a seasoned FPGA/RTL engineer to contribute to adaptive and embedded computing programs.

You will work across time zones with architects, hardware and SW-FW teams to translate product concepts into silicon-ready RTL designs. You will apply modern RTL methods, leverage AI-driven automation, and support PPA, cost and schedule optimization for first-time-right silicon and software solutions.