Lead DRAM RTL Design Engineer | Signoff to Silicon

Micron Technology, Inc; Boise (ID); On-site; USD 120,000 - 150,000; Full time

Benefits offered by this job

Medical, dental, and vision insurance

Paid time-off and holidays

Job summary

Micron Technology, Inc in Boise, Idaho is looking for a Principal RTL Design Engineer to lead the design of high-quality DRAM digital and mixed-signal IP. The role encompasses the complete RTL design lifecycle, with responsibilities including architecture, implementation, and sign-off. Candidates should possess a Master’s with 8+ years of experience or a Bachelor’s with 10+, along with proficiency in Verilog/SystemVerilog and low-power design methodologies. Strong opportunities for collaboration and technical leadership await.

Qualifications

• 8+ years of experience in pre-silicon RTL design.
• Proven ownership of RTL/IP development from micro-architecture to physical design.
• In-depth knowledge of logic synthesis and timing analysis.

Responsibilities

• Lead RTL design for DRAM digital and mixed-signal IP.
• Collaborate with teams to achieve timing closure and PPA goals.
• Drive automation and improve design methodologies.

Skills

RTL design

ASIC low-power design methodologies

Verilog/SystemVerilog

functional verification

Education

Master’s degree in Electrical Engineering

Bachelor’s degree

Tools

simulation tools

front-end tools

Job description

Micron Technology, Inc in Boise, Idaho is looking for a Principal RTL Design Engineer to lead the design of high-quality DRAM digital and mixed-signal IP. The role encompasses the complete RTL design lifecycle, with responsibilities including architecture, implementation, and sign-off. Candidates should possess a Master’s with 8+ years of experience or a Bachelor’s with 10+, along with proficiency in Verilog/SystemVerilog and low-power design methodologies. Strong opportunities for collaboration and technical leadership await.