Senior RTL Design Engineer - DRAM & Low-Power

1000 Micron Technology, Inc.; Boise (ID); On-site; USD 100,000 - 130,000; Full time

Benefits offered by this job

Medical, dental, and vision plans

Paid family leave

Paid time off and holidays

Job summary

1000 Micron Technology, Inc. is seeking a Senior RTL Engineer to build and develop DRAM digital and mixed-signal blocks in Boise, Idaho. This role supports the RTL lifecycle from specification to signoff, working closely with multi-functional teams to ensure product performance meets targets.

Candidates should have relevant educational backgrounds with strong skills in RTL design and ASIC methodologies. The position emphasizes collaboration and offers benefits aimed at personal and professional growth.

Qualifications

• 4+ years of experience in pre-silicon RTL design, preferably for complex digital IP.
• Experience with ASIC design flows, including verification and static timing analysis.
• Familiarity with CMOS digital and analog‑integrated circuit concepts.

Responsibilities

• Contribute to RTL build of digital and mixed‑signal components for DRAM.
• Implement high‑performance, power‑ and area‑efficient RTL designs.
• Collaborate with physical design to achieve timing and PPA goals.

Skills

RTL design

Digital IP development

ASIC low-power design methodologies

Verilog/SystemVerilog

Education

Master’s degree in Electrical Engineering

Bachelor’s degree in related field

Tools

RTL simulation tools

Job description

1000 Micron Technology, Inc. is seeking a Senior RTL Engineer to build and develop DRAM digital and mixed-signal blocks in Boise, Idaho. This role supports the RTL lifecycle from specification to signoff, working closely with multi-functional teams to ensure product performance meets targets.

Candidates should have relevant educational backgrounds with strong skills in RTL design and ASIC methodologies. The position emphasizes collaboration and offers benefits aimed at personal and professional growth.