Senior ATE Test Engineer (SoC & High‑Speed)

Astera Labs; San Jose (CA); On-site; USD 136,000 - 170,000; Full time

Benefits offered by this job

Discretionary bonus

Benefits

Job summary

Astera Labs in San Jose, California, seeks a Senior ATE Test Engineer to lead complex mixed-signal SoC test strategies from design through high-volume ramp. You will develop and oversee ATE programs, interact with manufacturing partners, and own testing efforts across wafer sort and final test.

The role requires hands-on experience with high-speed protocols, ATE platforms, and FPGA/embedded scripting, with a focus on quality and manufacturability in a fast-growing AI connectivity company.

Qualifications

• Bachelor's degree in Electrical Engineering required; Master's preferred.
• ≥2 years releasing complex SoC/silicon to high volume manufacturing.
• Experience with high-speed protocols (PCIe, Ethernet, Infiniband, DDR, NVMe, USB).
• Able to multitask with minimal supervision and work in a team.
• Strong communication skills and proactive, can-do attitude.

Responsibilities

• Develop and own the SoC ATE test strategy and programs.
• Collaborate with design and manufacturing to optimize test coverage.
• Select and develop ATE hardware for wafer sort and final test.
• Improve tester resources and reduce ATE test time while preserving quality.
• Implement DFT techniques (SCAN, MEMBIST, SerDes) for coverage.

Skills

Electrical engineering

High-speed protocols

PCIe

Ethernet

Infiniband

DDR

NVMe

USB

Team collaboration

Programming (C/C++, Python)

Education

Bachelor's in EE

Master's preferred

Tools

Advantest 93k ATE

Oscilloscopes

Protocol analyzers

Bench-ATE

I2C/I3C/SPI/JTAG

Job description

Astera Labs in San Jose, California, seeks a Senior ATE Test Engineer to lead complex mixed-signal SoC test strategies from design through high-volume ramp. You will develop and oversee ATE programs, interact with manufacturing partners, and own testing efforts across wafer sort and final test.

The role requires hands-on experience with high-speed protocols, ATE platforms, and FPGA/embedded scripting, with a focus on quality and manufacturability in a fast-growing AI connectivity company.