Principal Analog & Mixed-Signal Design Architect

Astera Labs

San Jose (CA)

On-site

USD 207,000 - 230,000

Full time

11 days ago
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Job summary

Astera Labs is redefining the connectivity powering rack-scale AI infrastructure. As Principal Analog Design Engineer, you will architect high-performance analog and mixed-signal circuits for SerDes, PHY, and high-speed I/O, shaping data-center infrastructure.

You will own designs from concept through silicon bring-up, set technical standards, and mentor engineers as we scale—an impactful role at a hyper-growth AI connectivity company.

Qualifications

  • MS or PhD in Electrical Engineering or related field.
  • 8+ years in analog and mixed-signal IC design.
  • Experience with high-speed analog circuits (PLLs, SerDes, data converters, references, regulators) on advanced CMOS/FinFET nodes.
  • Strong understanding of physical-layer design, signal integrity, and high-speed I/O.
  • Proficiency with Cadence Virtuoso and Spectre; layout/parasitic-aware design.

Responsibilities

  • Analog & Mixed-Signal Design: architect and design high-speed analog and mixed-signal circuits including PLLs, LDOs, references, high-speed SerDes building blocks, ADCs/DACs, and clocking.
  • Silicon Execution & Validation: lead silicon bring-up, characterization, and debug; define and execute test plans to correlate silicon performance against design targets.
  • Technical Leadership: set analog design methodology, review standards, and best practices; mentor and guide junior engineers.

Skills

Analog & Mixed-Signal Design
High-Speed Circuit Design
Signal Integrity
EDA Tools Cadence Virtuoso/Spectre
Mentoring/Leadership

Education

MS/PhD in Electrical Engineering

Tools

Cadence Virtuoso
Spectre

Job description

Astera Labs is redefining the connectivity powering rack-scale AI infrastructure. As Principal Analog Design Engineer, you will architect high-performance analog and mixed-signal circuits for SerDes, PHY, and high-speed I/O, shaping data-center infrastructure.

You will own designs from concept through silicon bring-up, set technical standards, and mentor engineers as we scale—an impactful role at a hyper-growth AI connectivity company.

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