Senior Principal SI/PI Engineer: High-Speed IP Innovator

Cadence Design Systems; San Jose (CA); On-site; USD 154,000 - 286,000; Full time

Benefits offered by this job

Paid vacation

401(k) match

Employee stock purchase plan

Medical/Dental/Vision

Job summary

Cadence Design Systems in California seeks a Sr Principal SI/PI Engineer to advance high-speed IP products. You will contribute hands-on in SI/PI design, verification, and lab measurements, providing channel models and design guidelines for customers.

The role emphasizes collaboration with R&D and customer support to optimize ASIC integration. The position requires strong SerDes/PHY expertise, 3D/2.5D extraction tool fluency, and IBIS-AMI simulations, with a focus on delivering reliable

Qualifications

• MS or PhD in Electrical Engineering (or similar degree).
• 3+ years of experience preferably working with high speed SerDes and PHYs.
• Hands-on lab experience with instruments like high speed oscilloscopes, TDRs, VNAs, spectrum analyzers, etc.
• Fluent with using 3D and 2.5D extraction tools like Sigrity Clarity/PowerSI or Ansys HFSS/SIwave.
• Experience with IBIS-AMI model simulations.
• Experience with simulation result to lab measurement correlation.
• Good understanding of PCB and FCBGA design rules and requirements.

Responsibilities

• Work on test chip package design SI/PI optimization and verification.
• Work on evaluation board design optimization for best SI/PI performance.
• Provide extracted and measured channel models for chip designers in the R&D team.
• Help with package and PCB SI/PI design guidelines and customer support on SI/PI related inquiries.
• Review customer package and board designs and simulation results; provide feedback to customers.
• Work on link performance simulations using S-parameter channel models and IBIS-AMI behavioral models.
• Help with SI/PI related debug of test chips or customer ASICs in the lab.

Skills

SerDes experience

High-speed PHYs

Debugging

Communication skills

Lab benchmarking

Education

MS/PhD in Electrical Engineering

Tools

Sigrity Clarity/PowerSI

Ansys HFSS/SIwave

IBIS-AMI simulations

Job description

Cadence Design Systems in California seeks a Sr Principal SI/PI Engineer to advance high-speed IP products. You will contribute hands-on in SI/PI design, verification, and lab measurements, providing channel models and design guidelines for customers.

The role emphasizes collaboration with R&D and customer support to optimize ASIC integration. The position requires strong SerDes/PHY expertise, 3D/2.5D extraction tool fluency, and IBIS-AMI simulations, with a focus on delivering reliable