Senior SI/PI Engineer for Multi-Gigabit PCB & PDN

The Consensus; San Jose (CA); On-site; USD 140,000 - 230,000; Full time

Benefits offered by this job

Medical, dental & vision coverage

Housing subsidy

Relocation support

Wellness benefits

Daily lunch/dinner in office

Unlimited compute budget

Job summary

Etched in San Jose is seeking a Signal Integrity and Power Integrity Engineer to own SI/PI methodology for high-speed PCB and system designs — from architecture through final release — ensuring electrical margins are met across multi-gigabit interfaces.

You will collaborate with PCB designers, ASIC teams, and test engineers to perform simulations, develop models, characterize PDN, and drive DFI checks, with hands-on lab work to improve hardware reliability and performance.

Qualifications

• Bachelor's or Master's in Electrical Engineering or closely related discipline.
• 5+ years of hands-on SI/PI experience on high-speed designs (>1 Gbps links, DDR4/5, or HBM interfaces).
• Proficiency with industry SI/PI EDA tools (Cadence Sigrity, Ansys SIwave/HFSS, Keysight ADS).

Responsibilities

• Perform pre- and post-layout SI simulations for high-speed interfaces (PCIe Gen5/Gen6, 112G/224G Ethernet).
• Conduct channel analysis, define topology constraints, stack-up requirements, and via optimization.
• Develop and maintain COM, IBIS, S-parameter, and SPICE models; correlate simulations with measurements.
• Execute PDN design and analysis: impedance profiling, decoupling, DC IR analysis.
• Drive DFI and layout checks for SI/PI compliance; collaborate with Cadence/Ansys tools.
• Collaborate with PCB, ASIC teams to define design guidelines early in lifecycle.
• Support bring-up, debug signal quality issues, and document root-cause actions.
• Develop simulation-to-hardware correlation databases for modeling accuracy.

Skills

SI/PI experience

High-speed PCB design

VNA measurements

S-parameter modeling

Lab measurement techniques

Transmission line theory

Education

B.S. or M.S. in Electrical Engineering

Tools

Cadence Sigrity

Ansys SIwave/HFSS

Keysight ADS

Job description

Etched in San Jose is seeking a Signal Integrity and Power Integrity Engineer to own SI/PI methodology for high-speed PCB and system designs — from architecture through final release — ensuring electrical margins are met across multi-gigabit interfaces.

You will collaborate with PCB designers, ASIC teams, and test engineers to perform simulations, develop models, characterize PDN, and drive DFI checks, with hands-on lab work to improve hardware reliability and performance.