Senior SIPI Engineer — High-Speed PDN & SerDes

Microchip Technology Inc.; San Jose (CA); On-site; USD 91,000 - 232,000; Full time

Job summary

Microchip Technology Inc. is seeking a Senior Technical Staff - Design (Signal and Power Integrity) in San Jose, CA. You will develop SIPI methodologies and drive PDN/SerDes performance across die, package, and boards, collaborating with global teams and mentoring peers.

Ideal candidates have 15+ years in SIPI, strong SerDes and PCB experience, and proficiency with HFSS/Siwave/HyperLynx/HSPICE/ADS in pre- and post-layout contexts.

Qualifications

• BS degree in Electrical Engineering or related field.
• 15+ years of relevant experience.
• 10+ years of hands-on SIPI experience.
• Extensive PCB design and layout experience.
• Strong SerDes experience (32G+ transceivers) desirable.
• Experience with PDN optimization and noise mitigation.
• Familiarity with S-Parameter extraction and channel modeling.
• Proficiency with industry-standard SI/PI tools.

Responsibilities

• Collaborate with global SIPI team and cross-functional partners.
• Develop SIPI methodologies for high-speed FPGA products.
• Perform pre-layout and post-layout SIPI simulations.
• Optimize PDN design and power integrity across die, package, and board.
• Mentor other SIPI engineers and contribute to design methodologies.

Skills

SIPI Expertise

Signal Integrity

Power Integrity

SerDes

PCB Design

PDN Design

Channel Modeling

Education

BS in Electrical Engineering

Tools

HFSS

Siwave

HyperLynx

HSPICE

ADS

Job description

Microchip Technology Inc. is seeking a Senior Technical Staff - Design (Signal and Power Integrity) in San Jose, CA. You will develop SIPI methodologies and drive PDN/SerDes performance across die, package, and boards, collaborating with global teams and mentoring peers.

Ideal candidates have 15+ years in SIPI, strong SerDes and PCB experience, and proficiency with HFSS/Siwave/HyperLynx/HSPICE/ADS in pre- and post-layout contexts.