Senior Principal SI Engineer – DDR/Memory Interface (Hybrid)

OSI Engineering; Johns Creek (GA); Hybride; USD 150 000 - 200 000; Plein temps

Résumé du poste

OSI Engineering is seeking a Senior Principal Engineer to join the Memory Interface Chips Business Unit in either San Jose, California or Johns Creek, Georgia. In this full-time role, you will lead efforts in signal and power integrity for high-performance DDR technologies, working closely with various engineering teams. Candidates should have a strong background in SI/PI and package design, as well as extensive experience with high-speed memory interfaces. The position includes a hybrid work schedule and is an exciting opportunity to contribute to cutting-edge technology.

Qualifications

• 10+ years of industry experience in signal integrity and package design.
• Experience with high-speed memory simulation and EM theory.
• Proficient in commercial EDA tools.

Responsabilités

• Create SI/PI methodologies for DDR products.
• Collaborate with design and validation teams for specifications.
• Provide guidelines based on SI/PI studies and simulations.

Connaissances

Signal Integrity

Power Integrity

Package Design

Interpersonal Skills

Simulation (Spice, ADS)

High-speed Memory (DDR4/DDR5)

Formation

MS or PhD in Electrical Engineering

Outils

ADS

HFSS

Q3D/PowerSI

RedHawk/Totem

Description du poste

OSI Engineering is seeking a Senior Principal Engineer to join the Memory Interface Chips Business Unit in either San Jose, California or Johns Creek, Georgia. In this full-time role, you will lead efforts in signal and power integrity for high-performance DDR technologies, working closely with various engineering teams. Candidates should have a strong background in SI/PI and package design, as well as extensive experience with high-speed memory interfaces. The position includes a hybrid work schedule and is an exciting opportunity to contribute to cutting-edge technology.