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Rambus is seeking a Sr. Principal Engineer with signal integrity and package design expertise to join the Memory Interface Chips BU in Georgia.
You will model, analyze, and simulate SI/PI for DDR4/5 devices with speeds up to 16000+ MT/s, reporting to the Senior Director. This full-time, hybrid role requires leading SI/PI methodologies, guiding packaging and PCB decoupling, and collaborating with design, validation, and customers to deliver high‑quality memory interfaces.
Rambus is seeking a Sr. Principal Engineer with signal integrity and package design expertise to join the Memory Interface Chips BU in Georgia.
You will model, analyze, and simulate SI/PI for DDR4/5 devices with speeds up to 16000+ MT/s, reporting to the Senior Director. This full-time, hybrid role requires leading SI/PI methodologies, guiding packaging and PCB decoupling, and collaborating with design, validation, and customers to deliver high‑quality memory interfaces.