Senior Principal SI Engineer (DDR4/5) – Hybrid Work

Rambus.com

Johns Creek (GA)

Hybrid

USD 126,000 - 234,000

Full time

8 days ago

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Benefits offered by this job

Bonus

Equity

401(k) match

Employee stock purchase plan

Medical benefits

Dental benefits

Time-off program

Gym membership

Job summary

Rambus is hiring an experienced Sr. Principal Engineer (SPE) for Signal Integrity and package design in Johns Creek, GA. The role reports to the Senior Director of Engineering and is a full-time position within the Memory Interface Chips BU.

You will work in a hybrid environment, spending about three days on-site and two days remote. You will lead SI/PI studies, develop packaging specifications, and collaborate with design, validation, and customers to optimize SI performance for DDR4/DDR5

Qualifications

MS or PhD in Electrical Engineering with 10+ years of industry experience
Experience with DDR4/5 and SERDES interfaces
Solid SI/PI and package design background
Experience with lab measurements and correlating with simulations
Proficiency with EDA tools (ADS, HFSS, Q3D/PowerSI)

Responsibilities

Create SI/PI methodologies and work with Design and SI teams for SI/PI study and package design for the DDR product portfolio
Define specifications and system design requirements (packaging, PCB routings, decoupling, channel simulations)
Provide guidelines to design teams based on SI/PI study and silicon correlation
Collaborate with customers to determine optimum SI/PI solutions
Support debug and lab Bring-Up as needed