Senior Principal Mixed-Signal Verification Architect

Renesas Electronics Corp.; Arizona; Presencial; USD 180.000 - 240.000; Jornada completa

Ventajas ofrecidas por este puesto de trabajo

Competitive benefits package

Diversity & Inclusion

Descripción de la vacante

Renesas Electronics Corp. is seeking a Principal Verification Engineer to lead mixed-signal verification for Automotive PMIC products. You will architect verification environments, drive plans, and mentor a team across multiple platforms.

The role requires hands-on experience with RNM/AMS, RTL and GLS flows, and strong debugging across analog and digital domains, aligning with automotive safety standards.

Formación

• MS or PhD in Electrical Engineering, Computer Engineering, or related field.
• 12+ years of experience in mixed-signal or analog circuit verification.
• Proficiency in Verilog, SystemVerilog, and SPICE-based languages.

Responsabilidades

• Design and architect mixed-signal verification environments for PMIC designs.
• Develop verification plans and strategies meeting automotive safety standards.
• Lead debugging of analog blocks and RTL across multiple product platforms.
• Mentor junior verification engineers and drive verification methodologies.

Conocimientos

Mixed-signal verification

RNM/AMS integration

RTL simulation

Verilog/SystemVerilog

UVM

Spectre/Xcelium

GLS (Gate-Level Simulation)

Analog/digital debugging

Automotive PMIC experience

Leadership/mentoring

Educación

MS or PhD in Electrical/Computer Engineering or related

Herramientas

Spectre

Xcelium

Descripción del empleo

Renesas Electronics Corp. is seeking a Principal Verification Engineer to lead mixed-signal verification for Automotive PMIC products. You will architect verification environments, drive plans, and mentor a team across multiple platforms.

The role requires hands-on experience with RNM/AMS, RTL and GLS flows, and strong debugging across analog and digital domains, aligning with automotive safety standards.